util/amdfwtool: Add Genoa support

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I83e3c383faec0fd7b2cf768b7a4c237edd986666
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76469
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Arthur Heymans 2023-07-13 11:40:08 +02:00 committed by Felix Held
parent 6603605d75
commit 563f7afa04
3 changed files with 11 additions and 1 deletions

View File

@ -706,6 +706,7 @@ static void fill_psp_directory_to_efs(embedded_firmware *amd_romsig, void *pspdi
case PLATFORM_PICASSO: case PLATFORM_PICASSO:
case PLATFORM_LUCIENNE: case PLATFORM_LUCIENNE:
case PLATFORM_RENOIR: case PLATFORM_RENOIR:
case PLATFORM_GENOA:
default: default:
/* for combo, it is also combo_psp_directory */ /* for combo, it is also combo_psp_directory */
amd_romsig->new_psp_directory = amd_romsig->new_psp_directory =
@ -721,6 +722,7 @@ static void fill_bios_directory_to_efs(embedded_firmware *amd_romsig, void *bios
case PLATFORM_RENOIR: case PLATFORM_RENOIR:
case PLATFORM_LUCIENNE: case PLATFORM_LUCIENNE:
case PLATFORM_CEZANNE: case PLATFORM_CEZANNE:
case PLATFORM_GENOA:
if (!cb_config->recovery_ab) if (!cb_config->recovery_ab)
amd_romsig->bios3_entry = amd_romsig->bios3_entry =
BUFF_TO_RUN_MODE(*ctx, biosdir, AMD_ADDR_REL_BIOS); BUFF_TO_RUN_MODE(*ctx, biosdir, AMD_ADDR_REL_BIOS);
@ -802,6 +804,9 @@ static uint32_t get_psp_id(enum platform soc_id)
case PLATFORM_PHOENIX: case PLATFORM_PHOENIX:
psp_id = 0xBC0D0400; psp_id = 0xBC0D0400;
break; break;
case PLATFORM_GENOA:
psp_id = 0xBC0C0111;
break;
case PLATFORM_CARRIZO: case PLATFORM_CARRIZO:
default: default:
psp_id = 0; psp_id = 0;
@ -1772,6 +1777,7 @@ static int set_efs_table(uint8_t soc_id, amd_cb_config *cb_config,
case PLATFORM_MENDOCINO: case PLATFORM_MENDOCINO:
case PLATFORM_PHOENIX: case PLATFORM_PHOENIX:
case PLATFORM_GLINDA: case PLATFORM_GLINDA:
case PLATFORM_GENOA:
amd_romsig->spi_readmode_f17_mod_30_3f = efs_spi_readmode; amd_romsig->spi_readmode_f17_mod_30_3f = efs_spi_readmode;
amd_romsig->spi_fastspeed_f17_mod_30_3f = efs_spi_speed; amd_romsig->spi_fastspeed_f17_mod_30_3f = efs_spi_speed;
switch (efs_spi_micron_flag) { switch (efs_spi_micron_flag) {

View File

@ -26,7 +26,8 @@ enum platform {
PLATFORM_MENDOCINO, PLATFORM_MENDOCINO,
PLATFORM_LUCIENNE, PLATFORM_LUCIENNE,
PLATFORM_PHOENIX, PLATFORM_PHOENIX,
PLATFORM_GLINDA PLATFORM_GLINDA,
PLATFORM_GENOA,
}; };
typedef enum _amd_fw_type { typedef enum _amd_fw_type {

View File

@ -115,6 +115,8 @@ static enum platform identify_platform(char *soc_name)
return PLATFORM_PHOENIX; return PLATFORM_PHOENIX;
else if (!strcasecmp(soc_name, "Glinda")) else if (!strcasecmp(soc_name, "Glinda"))
return PLATFORM_GLINDA; return PLATFORM_GLINDA;
else if (!strcasecmp(soc_name, "Genoa"))
return PLATFORM_GENOA;
else else
return PLATFORM_UNKNOWN; return PLATFORM_UNKNOWN;
} }
@ -733,6 +735,7 @@ static bool is_second_gen(enum platform platform_type)
case PLATFORM_MENDOCINO: case PLATFORM_MENDOCINO:
case PLATFORM_PHOENIX: case PLATFORM_PHOENIX:
case PLATFORM_GLINDA: case PLATFORM_GLINDA:
case PLATFORM_GENOA:
return true; return true;
case PLATFORM_UNKNOWN: case PLATFORM_UNKNOWN:
default: default: