Revert "nb/intel/ironlake: Handle broken ME firmware"

This reverts commit 4447996cc5.

It looks like the patch repurposed the `memory_reserved_for_heci_mb`
variable as an indicator if the ME firmware is fine. The change to
setup_heci_uma() made it bail out early, even though the implementation
is obviously prepared to set things up even if the requested UMA
size is 0. This also leaves the code in an inconsistent state: The
second if's condition is always true.

Resolves: https://ticket.coreboot.org/issues/305
Change-Id: Ie5a98be3f660078a85a79b5551e86f90f148974f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52426
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Ott <coreboot@desire.ch>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber 2021-04-23 15:23:14 +00:00
parent 109a9ec339
commit 564413246d
1 changed files with 3 additions and 5 deletions

View File

@ -1689,7 +1689,7 @@ static void send_heci_uma_message(const u64 heci_uma_addr, const unsigned int he
static void setup_heci_uma(struct raminfo *info)
{
if (!info->memory_reserved_for_heci_mb || !(pci_read_config32(HECIDEV, 0x40) & 0x20))
if (!info->memory_reserved_for_heci_mb && !(pci_read_config32(HECIDEV, 0x40) & 0x20))
return;
const u64 heci_uma_addr =
@ -3176,10 +3176,8 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
;
/* Wait for ME to be ready */
if (intel_early_me_init() == 0)
info.memory_reserved_for_heci_mb = intel_early_me_uma_size();
else
info.memory_reserved_for_heci_mb = 0;
intel_early_me_init();
info.memory_reserved_for_heci_mb = intel_early_me_uma_size();
/* before SPD */
timestamp_add_now(101);