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siemens/mc_apl1: Disable PCI clock outputs on XIO bridge 

This patch disables the unused PCI clock outputs on the XIO2001 PCI
Express to PCI Bridge.

Change-Id: I0b9cf51a713f4ab46e71d250397486d136c26177
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer 2018-08-23 14:48:06 +02:00 committed by Werner Zeh
parent c5cca15cce
commit 56508967d8
2 changed files with 9 additions and 0 deletions
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1
src/include/device/pci_ids.h
View File

@ -782,6 +782,7 @@
#define PCI_VENDOR_ID_TI 0x104c
#define PCI_DEVICE_ID_TI_TVP4010 0x3d04
#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
#define PCI_DEVICE_ID_TI_XIO2001 0x8240
#define PCI_DEVICE_ID_TI_1130 0xac12
#define PCI_DEVICE_ID_TI_1031 0xac13
#define PCI_DEVICE_ID_TI_1131 0xac15

8
src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
View File

@ -15,6 +15,8 @@
#include <bootstate.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <gpio.h>
#include <hwilib.h>
#include <intelblocks/lpc_lib.h>
@ -28,6 +30,7 @@
void variant_mainboard_final(void)
{
int status;
struct device *dev = NULL;
/*
* Set up the DP2LVDS converter.
@ -47,6 +50,11 @@ void variant_mainboard_final(void)
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#
*/
pcr_write16(PID_ITSS, 0x314c, 0x0321);
/* Disable clock outputs 1-5 (CLKOUT) for XIO2001 PCIe to PCI Bridge. */
dev = dev_find_device(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2001, 0);
if (dev)
pci_write_config8(dev, 0xd8, 0x3e);
}
static void wait_for_legacy_dev(void *unused)