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mb/intel/shadowmountain: Disable xDCI 

This patch disables the xDCI which is causing PC8 to PC10 state
transitions during sleep.

TEST: Confirmed that the transition is happening with this change.

Change-Id: I9bbf7b52c36954600d7e66f9b03fad39b8881a5f
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
This commit is contained in:
Sugnan Prabhu S 2021-03-05 16:29:29 +05:30 committed by Patrick Georgi
parent 82dcd5b9ba
commit 565359fee0
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
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@ -197,7 +197,7 @@ chip soc/intel/alderlake
device pci 09.0 off end # NPK device pci 09.0 off end # NPK
device pci 0a.0 off end # Crash-log SRAM device pci 0a.0 off end # Crash-log SRAM
device pci 0d.0 on end # USB xHCI device pci 0d.0 on end # USB xHCI
device pci 0d.1 on end # USB xDCI (OTG) device pci 0d.1 off end # USB xDCI (OTG)
device pci 0d.2 on device pci 0d.2 on
chip drivers/intel/usb4/retimer chip drivers/intel/usb4/retimer
register "power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19)" register "power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19)"