diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 15a5a3120d..9e97d2ca2c 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -186,6 +186,22 @@ config FSP_FD_PATH depends on FSP_USE_REPO default "3rdparty/fsp/IceLakeFspBinPkg/Fsp.fd" +config SOC_INTEL_ICELAKE_DEBUG_CONSENT + int "Debug Consent for ICL" + # USB DBC is more common for developers so make this default to 3 if + # SOC_INTEL_DEBUG_CONSENT=y + default 3 if SOC_INTEL_DEBUG_CONSENT + default 0 + help + This is to control debug interface on SOC. + Setting non-zero value will allow to use DBC or DCI to debug SOC. + PlatformDebugConsent in FspmUpd.h has the details. + + Desired platform debug types are + 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), + 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), + 6:Enable (2-wire DCI OOB), 7:Manual + config ENABLE_DISPLAY_OVER_EXT_PCIE_GFX bool "Enable display over external PCIE GFX card" select ALWAYS_LOAD_OPROM diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index 068751324f..569160f41f 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -203,15 +203,6 @@ struct soc_intel_icelake_config { uint8_t PmTimerDisabled; - /* Desired platform debug type. */ - enum { - DebugConsent_Disabled, - DebugConsent_DCI_DBC, - DebugConsent_DCI, - DebugConsent_USB3_DBC, - DebugConsent_XDP, /* XDP/Mipi60 */ - DebugConsent_USB2_DBC, - } DebugConsent; /* * SerialIO device mode selection: * PchSerialIoDisabled, diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c index 1f9960410e..8dd6bfdcf7 100644 --- a/src/soc/intel/icelake/romstage/fsp_params.c +++ b/src/soc/intel/icelake/romstage/fsp_params.c @@ -87,7 +87,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) /* Enable SMBus controller based on config */ m_cfg->SmbusEnable = config->SmbusEnable; /* Set debug probe type */ - m_cfg->PlatformDebugConsent = config->DebugConsent; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ICELAKE_DEBUG_CONSENT; /* Vt-D config */ m_cfg->VtdDisable = 0; diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 79d74b4083..8d066f3d45 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -212,4 +212,19 @@ config FSP_FD_PATH default "3rdparty/fsp/JasperLakeFspBinPkg/Fsp.fd" if SOC_INTEL_JASPERLAKE default "3rdparty/fsp/TigerLakeFspBinPkg/Fsp.fd" if SOC_INTEL_TIGERLAKE +config SOC_INTEL_TIGERLAKE_DEBUG_CONSENT + int "Debug Consent for TGL" + # USB DBC is more common for developers so make this default to 3 if + # SOC_INTEL_DEBUG_CONSENT=y + default 3 if SOC_INTEL_DEBUG_CONSENT + default 0 + help + This is to control debug interface on SOC. + Setting non-zero value will allow to use DBC or DCI to debug SOC. + PlatformDebugConsent in FspmUpd.h has the details. + + Desired platform debug type are + 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), + 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), + 6:Enable (2-wire DCI OOB), 7:Manual endif diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 54423613dc..02855b1b00 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -169,17 +169,6 @@ struct soc_intel_tigerlake_config { */ uint32_t PrmrrSize; uint8_t PmTimerDisabled; - /* Desired platform debug type. */ - enum { - DebugConsent_Disabled, - DebugConsent_DCI_DBC, - DebugConsent_DCI, - DebugConsent_USB3_DBC, - DebugConsent_XDP, /* XDP/Mipi60 */ - DebugConsent_USB2_DBC, - DebugConsent_2WIRE_DCI, - DebugConsent_Manual, - } DebugConsent; /* * SerialIO device mode selection: * PchSerialIoDisabled, diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c index 829e1e35ea..56124f4c04 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c @@ -80,7 +80,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->SmbusEnable = config->SmbusEnable; /* Set debug probe type */ - m_cfg->PlatformDebugConsent = config->DebugConsent; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT; /* VT-d config */ m_cfg->VtdDisable = 0; diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c index ed6aa5a221..d76961515f 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c @@ -109,7 +109,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* Enable SMBus controller based on config */ m_cfg->SmbusEnable = config->SmbusEnable; /* Set debug probe type */ - m_cfg->PlatformDebugConsent = config->DebugConsent; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT; /* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ m_cfg->PchHdaDspEnable = config->PchHdaDspEnable;