soc/amd/picasso: Remove I2C4
Remove I2C4 since it is a slave device used for USB-C mux control and should not be included with the other master devices. BUG=b:160624619 b:160292546 TEST=EC can communicate with AP mux I2C4 slave Change-Id: Idaad618e90d6264d881dc66628cf581a856c231d Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43263 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -139,7 +139,6 @@ Device (AOAC) {
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AOAC_DEVICE(I2C2, 7, 0)
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AOAC_DEVICE(I2C2, 7, 0)
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AOAC_DEVICE(I2C3, 8, 0)
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AOAC_DEVICE(I2C3, 8, 0)
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AOAC_DEVICE(I2C4, 9, 5) /* I2C4 is powered from the S5 power group. */
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AOAC_DEVICE(FUR1, 12, 0)
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AOAC_DEVICE(FUR1, 12, 0)
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AOAC_DEVICE(FUR2, 16, 0)
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AOAC_DEVICE(FUR2, 16, 0)
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AOAC_DEVICE(FUR3, 26, 0)
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AOAC_DEVICE(FUR3, 26, 0)
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@ -345,52 +345,6 @@ Device (I2C3)
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}
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}
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}
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}
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Device (I2C4) {
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Name (_HID, "AMD0010")
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Name (_UID, 0x4)
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Method (_CRS, 0) {
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Local0 = ResourceTemplate() {
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Interrupt (
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ResourceConsumer,
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Edge,
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000)
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}
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CreateDWordField (Local0, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = II24
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} Else {
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IRQN = PI24
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000)
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})
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} Else {
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Return (Local0)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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{
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Return (0x0F)
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}
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Name (_PR0, Package () { \_SB.AOAC.I2C4 })
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Name (_PR2, Package () { \_SB.AOAC.I2C4 })
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Name (_PR3, Package () { \_SB.AOAC.I2C4 })
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Method (_PS0, 0, Serialized) {
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Printf("I2C4._PS0")
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\_SB.AOAC.I2C4.TDS = 1
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}
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Method (_PS3, 0, Serialized) {
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Printf("I2C4._PS3")
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\_SB.AOAC.I2C4.TDS = 3
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}
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}
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Device (MISC)
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Device (MISC)
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{
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{
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Name (_HID, "AMD0040")
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Name (_HID, "AMD0040")
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@ -39,7 +39,8 @@
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/* I2C parameters for lpc_read_resources */
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/* I2C parameters for lpc_read_resources */
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#define I2C_BASE_ADDRESS APU_I2C2_BASE
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#define I2C_BASE_ADDRESS APU_I2C2_BASE
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#define I2C_DEVICE_SIZE 0x00001000
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#define I2C_DEVICE_SIZE 0x00001000
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#define I2C_DEVICE_COUNT 3
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#define I2C_DEVICE_COUNT (I2C_MASTER_DEV_COUNT \
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- I2C_MASTER_START_INDEX)
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#define APU_DMAC0_BASE 0xfedc7000
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#define APU_DMAC0_BASE 0xfedc7000
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#define APU_DMAC1_BASE 0xfedc8000
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#define APU_DMAC1_BASE 0xfedc8000
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