Move subsystem IDs to devicetree.cb

A while back coreboot was changed to read the subsystem IDs from
devicetree.cb to allow each onboard PCI device to have its own
subsystem id. When we originally branched, this was not the case,
and the sandybridge/ivybridge mainboards have not been updated yet.
Also, drop the subsystem ID from Emerald Lake 2, since it's not a
Google device.

Change-Id: Ie96fd67cd2ff65ad6ff725914e3bad843e78712e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1042
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Stefan Reinauer 2012-05-15 12:36:57 -07:00 committed by Patrick Georgi
parent 5649b08e20
commit 56c7dc7972
5 changed files with 2 additions and 24 deletions

View File

@ -43,12 +43,4 @@ config VGA_BIOS_FILE
string string
default "pci8086,0166.rom" default "pci8086,0166.rom"
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x1ae0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0xc000
endif # BOARD_INTEL_EMERALDLAKE2 endif # BOARD_INTEL_EMERALDLAKE2

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@ -44,14 +44,6 @@ config VGA_BIOS_FILE
string string
default "pci8086,0106.rom" default "pci8086,0106.rom"
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x1ae0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0xc000
config MAINBOARD_POWER_ON_AFTER_POWER_FAIL config MAINBOARD_POWER_ON_AFTER_POWER_FAIL
bool bool
default n default n

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@ -33,6 +33,7 @@ chip northbridge/intel/sandybridge
end end
device pci_domain 0 on device pci_domain 0 on
subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device pci 00.0 on end # host bridge
device pci 02.0 on end # vga controller device pci 02.0 on end # vga controller

View File

@ -43,14 +43,6 @@ config VGA_BIOS_FILE
string string
default "pci8086,0106.rom" default "pci8086,0106.rom"
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x1ae0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0xc000
config MAINBOARD_POWER_ON_AFTER_POWER_FAIL config MAINBOARD_POWER_ON_AFTER_POWER_FAIL
bool bool
default n default n

View File

@ -28,6 +28,7 @@ chip northbridge/intel/sandybridge
end end
device pci_domain 0 on device pci_domain 0 on
subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge device pci 00.0 on end # host bridge
device pci 02.0 on end # vga controller device pci 02.0 on end # vga controller