soc/amd/common/block/acpi/cpu_power_state: use pstate_msr union

Use the pstate_msr union in get_pstate_info to check if the P state
enable bit is set. Also drop the now unused PSTATE_DEF_HI_ENABLE_SHIFT
and PSTATE_DEF_HI_ENABLE_MASK definitions.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I79119e09af79a4bb680a18e93b4a61a049f0080e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-03-22 23:51:46 +01:00
parent a25117d83f
commit 56d2a97665
2 changed files with 6 additions and 6 deletions

View file

@ -41,8 +41,6 @@
#define PS_STS_REG 0xC0010063
#define PSTATE_0_MSR 0xC0010064
#define PSTATE_MSR(pstate) (PSTATE_0_MSR + (pstate))
#define PSTATE_DEF_HI_ENABLE_SHIFT 31
#define PSTATE_DEF_HI_ENABLE_MASK (0x1 << PSTATE_DEF_HI_ENABLE_SHIFT)
#define MSR_PATCH_LOADER 0xC0010020

View file

@ -7,6 +7,7 @@
#include <console/console.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/msr.h>
#include <soc/msr.h>
#include <types.h>
/*
@ -16,8 +17,9 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values,
struct acpi_xpss_sw_pstate *pstate_xpss_values)
{
msr_t pstate_def;
union pstate_msr pstate_reg;
size_t pstate_count, pstate;
uint32_t pstate_enable, max_pstate;
uint32_t max_pstate;
pstate_count = 0;
max_pstate = (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT;
@ -25,9 +27,9 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values,
for (pstate = 0; pstate <= max_pstate; pstate++) {
pstate_def = rdmsr(PSTATE_MSR(pstate));
pstate_enable = (pstate_def.hi & PSTATE_DEF_HI_ENABLE_MASK)
>> PSTATE_DEF_HI_ENABLE_SHIFT;
if (!pstate_enable)
pstate_reg.raw = pstate_def.raw;
if (!pstate_reg.pstate_en)
continue;
pstate_values[pstate_count].core_freq = get_pstate_core_freq(pstate_def);