mb/starlabs/starbook: Adjust TCC Offset for all boards
Lower the TCC Offset by 10 degress. Change-Id: Ib80d3b73c41ec1196d8294c35b43333e0df218d5 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76374 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -22,17 +22,17 @@ void devtree_update(void)
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disable_turbo();
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soc_conf->tdp_pl1_override = 15;
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soc_conf->tdp_pl2_override = 15;
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cfg->tcc_offset = 20;
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cfg->tcc_offset = 30;
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break;
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case PP_BALANCED:
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soc_conf->tdp_pl1_override = 17;
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soc_conf->tdp_pl2_override = 20;
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cfg->tcc_offset = 15;
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cfg->tcc_offset = 25;
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break;
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case PP_PERFORMANCE:
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soc_conf->tdp_pl1_override = 20;
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soc_conf->tdp_pl2_override = 25;
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cfg->tcc_offset = 10;
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cfg->tcc_offset = 20;
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break;
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}
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@ -31,21 +31,21 @@ void devtree_update(void)
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soc_conf_4core->tdp_pl1_override = 15;
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soc_conf_2core->tdp_pl2_override = 15;
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soc_conf_4core->tdp_pl2_override = 15;
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cfg->tcc_offset = 20;
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cfg->tcc_offset = 30;
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break;
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case PP_BALANCED:
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soc_conf_2core->tdp_pl1_override = 15;
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soc_conf_4core->tdp_pl1_override = 15;
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soc_conf_2core->tdp_pl2_override = 25;
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soc_conf_4core->tdp_pl2_override = 25;
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cfg->tcc_offset = 15;
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cfg->tcc_offset = 25;
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break;
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case PP_PERFORMANCE:
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soc_conf_2core->tdp_pl1_override = 28;
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soc_conf_4core->tdp_pl1_override = 28;
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soc_conf_2core->tdp_pl2_override = 40;
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soc_conf_4core->tdp_pl2_override = 40;
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cfg->tcc_offset = 10;
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cfg->tcc_offset = 20;
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break;
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}
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