remove some style guide breaks and warnings from raminit_f_dqs.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -1732,7 +1732,8 @@ static void set_top_mem_ap(unsigned tom_k, unsigned tom2_k)
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wrmsr(TOP_MEM, msr);
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}
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static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k){
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static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k)
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{
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unsigned reg;
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msr_t msr;
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@ -1762,7 +1763,8 @@ static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k){
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}
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static void clear_mtrr_dqs(unsigned tom2_k){
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static void clear_mtrr_dqs(unsigned tom2_k)
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{
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msr_t msr;
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unsigned i;
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@ -1825,21 +1827,28 @@ static void set_sysinfo_in_ram(unsigned val)
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
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#else
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
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{
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return nvram_pos;
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}
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
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die("No memory NVRAM loader for DQS data! Unable to restore memory state\n");
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
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{
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die("No memory NVRAM loader for DQS data! Unable to restore memory state\n");
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return nvram_pos; /* Make GCC happy */
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}
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#endif
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static int save_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) {
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static int save_index_to_pos(unsigned int dev, int size, int index, int nvram_pos)
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{
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u32 dword = pci_read_config32_index_wait(dev, 0x98, index);
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return s3_save_nvram_early(dword, size, nvram_pos);
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}
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static int load_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) {
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static int load_index_to_pos(unsigned int dev, int size, int index, int nvram_pos)
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{
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u32 old_dword = pci_read_config32_index_wait(dev, 0x98, index);
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nvram_pos = s3_load_nvram_early(size, &old_dword, nvram_pos);
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@ -1847,7 +1856,8 @@ static int load_index_to_pos(unsigned int dev, int size, int index, int nvram_po
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return nvram_pos;
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}
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static int dqs_load_MC_NVRAM_ch(unsigned int dev, int ch, int pos) {
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static int dqs_load_MC_NVRAM_ch(unsigned int dev, int ch, int pos)
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{
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/* 30 bytes per channel */
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ch *= 0x20;
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pos = load_index_to_pos(dev, 4, 0x00 + ch, pos);
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@ -1865,7 +1875,8 @@ static int dqs_load_MC_NVRAM_ch(unsigned int dev, int ch, int pos) {
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return pos;
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}
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static int dqs_save_MC_NVRAM_ch(unsigned int dev, int ch, int pos) {
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static int dqs_save_MC_NVRAM_ch(unsigned int dev, int ch, int pos)
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{
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/* 30 bytes per channel */
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ch *= 0x20;
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pos = save_index_to_pos(dev, 4, 0x00 + ch, pos);
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@ -1883,7 +1894,8 @@ static int dqs_save_MC_NVRAM_ch(unsigned int dev, int ch, int pos) {
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return pos;
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}
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static void dqs_save_MC_NVRAM(unsigned int dev) {
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static void dqs_save_MC_NVRAM(unsigned int dev)
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{
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int pos = 0;
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u32 reg;
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printk_debug("DQS SAVE NVRAM: %x\n", dev);
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@ -1894,7 +1906,8 @@ static void dqs_save_MC_NVRAM(unsigned int dev) {
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pos = s3_save_nvram_early(reg, 4, pos);
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}
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static void dqs_restore_MC_NVRAM(unsigned int dev) {
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static void dqs_restore_MC_NVRAM(unsigned int dev)
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{
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int pos = 0;
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u32 reg;
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