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samus: Set codec PDM clock output to 3MHz 

Currently the rt5677 codec outputs 6MHz PDM clock which is
out-of-spec for the speaker amp SSM2537. The amp's GAIN_FS
pin is pulled down to PGND with a 47k resistor, so the
expected PDM clock is 64*FS (~3MHz) according to its datasheet.

The corresponding kernel patch that adds the PDM clock config
option is https://chromium-review.googlesource.com/#/c/230303/

BUG=chrome-os-partner:33303
BRANCH=samus
TEST=flash coreboot with this patch and see PDM CLK went
from 6MHz to 3MHz on samus with a scope.

Change-Id: Icf2c61930175bede1ee8ebc2b0fb17c2938b806c
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: b9ba4597515b2fbcc72fa22e296357c454175648
Original-Change-Id: I09acdf47bab4f641981491a84197de234918435e
Original-Signed-off-by: Ben Zhang <benzh@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/230344
Original-Reviewed-by: Dylan Reid <dgreid@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9277
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Ben Zhang 2014-11-17 17:21:09 -08:00 committed by Patrick Georgi
parent f208905fda
commit 573429b09d
1 changed files with 1 additions and 0 deletions
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1
src/mainboard/google/samus/acpi/mainboard.asl
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@ -170,6 +170,7 @@ Scope (\_SB.PCI0.I2C0)
Name (WAKE, 45) /* DSP_INT (use as codec wake) */
Name (DCLK, 0) /* RT5677_DMIC_CLK1 */
Name (PCLK, 1) /* RT5677_PDM_CLK_DIV2 (~3MHz) */
Name (IN1, 1) /* IN1 differential */
Name (IN2, 0) /* IN2 not differential */
Name (OUT1, 1) /* LOUT1 differential */