cpu/intel/model_206ax: Lock MSR on all cores
Lock MSR MSR_PKG_CST_CONFIG_CONTROL on all cores, not only the one handling APM_CNT_FINALIZE. Tested on HP Z220: FWTS no longer reports this as an issue. Change-Id: I174d6c6c74fbba47992084cc44ebddf84eeeabd1 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -25,9 +25,6 @@
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void intel_model_206ax_finalize_smm(void)
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void intel_model_206ax_finalize_smm(void)
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{
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{
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/* Lock C-State MSR */
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msr_set_bit(MSR_PKG_CST_CONFIG_CONTROL, 15);
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/* Lock AES-NI only if supported */
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/* Lock AES-NI only if supported */
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if (cpuid_ecx(1) & (1 << 25))
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if (cpuid_ecx(1) & (1 << 25))
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msr_set_bit(MSR_FEATURE_CONFIG, 0);
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msr_set_bit(MSR_FEATURE_CONFIG, 0);
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@ -256,6 +256,8 @@ static void configure_c_states(void)
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msr.lo |= (1 << 25); // C3 Auto Demotion Enable
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msr.lo |= (1 << 25); // C3 Auto Demotion Enable
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msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection
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msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection
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msr.lo |= 7; // No package C-state limit
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msr.lo |= 7; // No package C-state limit
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msr.lo |= (1 << 15); // Lock C-State MSR
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wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);
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wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);
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msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);
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msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);
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