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google/banon: Add support for additional RAM types/configs 

Adapted from chromium commits 831a372 and cc96c27
[Banon: board 2nd source DDR memory]

Add support for hynix/H9CCNNN8GTALAR-NUD and Nanya/NT6CL256T32CM-H1

Original-Change-Id: Ifd161ba5ade44e71c88655f760ca66668b5c5178
Original-Change-Id: I5cba13701ed8e037e21d34ed55162ee56291a842
Original-Signed-off-by: T.H. Lin <T.H_Lin@quantatw.com>
Original-Tested-by: TH Lin <t.h_lin@quanta.corp-partner.google.com>
Original-Reviewed-by: Vincent Wang <vwang@chromium.org>
Original-Reviewed-by: YH Lin <yueherngl@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I2166d1025ede33148c7ab623ba59190a342c4736
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Matt DeVillier 2018-07-31 17:20:00 -05:00 committed by Patrick Georgi
parent c9f0732cf1
commit 5745456343
2 changed files with 12 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/cyan/variants/banon/Makefile.inc
View File

@ -26,6 +26,8 @@ SPD_SOURCES += samsung_2GiB_dimm_K4E8E324EB-EGCF
SPD_SOURCES += empty SPD_SOURCES += empty
SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD
SPD_SOURCES += micron_2GiB_dimm_MT52L256M32D1PF SPD_SOURCES += micron_2GiB_dimm_MT52L256M32D1PF
SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD
SPD_SOURCES += nanya_dimm_NT6CL256T32CM-H1
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)

12
src/mainboard/google/cyan/variants/banon/spd_util.c
View File

@ -23,11 +23,14 @@
* 0b0001 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF * 0b0001 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF
* 0b0011 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR * 0b0011 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR
* 0b0100 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF * 0b0100 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF
* * 0b0101 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTALAR
* 0b0110 - 4GiB total - 2 x 2GiB NY NT6CL256T32CM-H1
* 0b1000 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE * 0b1000 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE
* 0b1001 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF * 0b1001 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF
* 0b1011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR * 0b1011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR
* 0b1100 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF * 0b1100 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF
* 0b1101 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTALAR
* 0b1110 - 2GiB total - 1 x 2GiB NY NT6CL256T32CM-H1
*/ */
int get_variant_spd_index(int ram_id, int *dual) int get_variant_spd_index(int ram_id, int *dual)
@ -56,7 +59,12 @@ int get_variant_spd_index(int ram_id, int *dual)
case 4: case 4:
printk(BIOS_DEBUG, "Micron MT52L256M32D1PF\n"); printk(BIOS_DEBUG, "Micron MT52L256M32D1PF\n");
break; break;
case 5:
printk(BIOS_DEBUG, "Hynix H9CCNNN8GTALAR\n");
break;
case 6:
printk(BIOS_DEBUG, "Nanya NT6CL256T32CM-H1\n");
break;
} }
return spd_index; return spd_index;
} }