google/banon: Add support for additional RAM types/configs
Adapted from chromium commits 831a372 and cc96c27 [Banon: board 2nd source DDR memory] Add support for hynix/H9CCNNN8GTALAR-NUD and Nanya/NT6CL256T32CM-H1 Original-Change-Id: Ifd161ba5ade44e71c88655f760ca66668b5c5178 Original-Change-Id: I5cba13701ed8e037e21d34ed55162ee56291a842 Original-Signed-off-by: T.H. Lin <T.H_Lin@quantatw.com> Original-Tested-by: TH Lin <t.h_lin@quanta.corp-partner.google.com> Original-Reviewed-by: Vincent Wang <vwang@chromium.org> Original-Reviewed-by: YH Lin <yueherngl@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I2166d1025ede33148c7ab623ba59190a342c4736 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -26,6 +26,8 @@ SPD_SOURCES += samsung_2GiB_dimm_K4E8E324EB-EGCF
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SPD_SOURCES += empty
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SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD
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SPD_SOURCES += micron_2GiB_dimm_MT52L256M32D1PF
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SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD
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SPD_SOURCES += nanya_dimm_NT6CL256T32CM-H1
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SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
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@ -23,11 +23,14 @@
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* 0b0001 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF
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* 0b0011 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR
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* 0b0100 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF
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*
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* 0b0101 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTALAR
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* 0b0110 - 4GiB total - 2 x 2GiB NY NT6CL256T32CM-H1
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* 0b1000 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE
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* 0b1001 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF
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* 0b1011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR
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* 0b1100 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF
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* 0b1101 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTALAR
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* 0b1110 - 2GiB total - 1 x 2GiB NY NT6CL256T32CM-H1
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*/
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int get_variant_spd_index(int ram_id, int *dual)
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@ -56,7 +59,12 @@ int get_variant_spd_index(int ram_id, int *dual)
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case 4:
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printk(BIOS_DEBUG, "Micron MT52L256M32D1PF\n");
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break;
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case 5:
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printk(BIOS_DEBUG, "Hynix H9CCNNN8GTALAR\n");
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break;
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case 6:
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printk(BIOS_DEBUG, "Nanya NT6CL256T32CM-H1\n");
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break;
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}
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return spd_index;
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}
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