mb/{lenovo/x201,packardbell/ms2290}: Remove superfluous TS init
Timestamps are initialized in cpu/intel/car/romstage.c. Change-Id: Ia2b762667be17aa5b482cd585dd6f6198cf50d9e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32758 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -175,10 +175,6 @@ void mainboard_romstage_entry(unsigned long bist)
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int s3resume = 0;
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int s3resume = 0;
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const u8 spd_addrmap[4] = { 0x50, 0, 0x51, 0 };
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const u8 spd_addrmap[4] = { 0x50, 0, 0x51, 0 };
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timestamp_init(timestamp_get());
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timestamp_add_now(TS_START_ROMSTAGE);
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if (bist == 0)
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if (bist == 0)
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enable_lapic();
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enable_lapic();
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@ -168,14 +168,10 @@ void mainboard_romstage_entry(unsigned long bist)
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int s3resume = 0;
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int s3resume = 0;
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const u8 spd_addrmap[4] = { 0x50, 0, 0x52, 0 };
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const u8 spd_addrmap[4] = { 0x50, 0, 0x52, 0 };
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timestamp_init(timestamp_get());
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/* SERR pin is confused on reset. Clear NMI. */
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/* SERR pin is confused on reset. Clear NMI. */
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outb(4, 0x61);
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outb(4, 0x61);
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outb(0, 0x61);
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outb(0, 0x61);
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timestamp_add_now(TS_START_ROMSTAGE);
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if (bist == 0)
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if (bist == 0)
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enable_lapic();
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enable_lapic();
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