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Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h` 

multiply_to_tsc was being copied everywhere, which is bad
practice. Put it in the tsc.h include file where it belongs.
Delete the copies of it.

Per secunet, no copyright notice is needed.

This might be a good time to get a copyright notice into tsc.h
anyway.

Change-Id: Ied0013ad4b1a9e5e2b330614bb867fd806f9a407
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/3242
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Ronald G. Minnich 2013-05-08 17:08:55 +02:00
parent 60c54cc017
commit 5750fddcba
4 changed files with 13 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/include/cpu/x86/tsc.h
View File

@ -27,6 +27,19 @@ static inline tsc_t rdtsc(void)
}
#if !defined(__ROMCC__)
/* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow.
* This code is used to prevent use of libgcc's umoddi3.
*/
static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b)
{
tsc->lo = (a & 0xffff) * (b & 0xffff);
tsc->hi = ((tsc->lo >> 16)
+ ((a & 0xffff) * (b >> 16))
+ ((b & 0xffff) * (a >> 16)));
tsc->lo = ((tsc->hi & 0xffff) << 16) | (tsc->lo & 0xffff);
tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16);
}
/* Too many registers for ROMCC */
static inline unsigned long long rdtscll(void)
{

12
src/northbridge/intel/gm45/delay.c
View File

@ -2,7 +2,6 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2008 coresystems GmbH
* 2012 secunet Security Networks AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,17 +23,6 @@
#include <cpu/intel/speedstep.h>
#include "delay.h"
/* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow. */
static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b)
{
tsc->lo = (a & 0xffff) * (b & 0xffff);
tsc->hi = ((tsc->lo >> 16)
+ ((a & 0xffff) * (b >> 16))
+ ((b & 0xffff) * (a >> 16)));
tsc->lo = ((tsc->hi & 0xffff) << 16) | (tsc->lo & 0xffff);
tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16);
}
/**
* Intel Core(tm) cpus always run the TSC at the maximum possible CPU clock
*/

12
src/northbridge/intel/i945/udelay.c
View File

@ -2,7 +2,6 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2008 coresystems GmbH
* 2012 secunet Security Networks AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,17 +23,6 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
/* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow. */
static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b)
{
tsc->lo = (a & 0xffff) * (b & 0xffff);
tsc->hi = ((tsc->lo >> 16)
+ ((a & 0xffff) * (b >> 16))
+ ((b & 0xffff) * (a >> 16)));
tsc->lo = ((tsc->hi & 0xffff) << 16) | (tsc->lo & 0xffff);
tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16);
}
/**
* Intel Core(tm) cpus always run the TSC at the maximum possible CPU clock
*/

13
src/northbridge/intel/sandybridge/udelay.c
View File

@ -26,19 +26,6 @@
* Intel SandyBridge/IvyBridge CPUs always run the TSC at BCLK=100MHz
*/
/* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow.
* This code is used to prevent use of libgcc's umoddi3.
*/
static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b)
{
tsc->lo = (a & 0xffff) * (b & 0xffff);
tsc->hi = ((tsc->lo >> 16)
+ ((a & 0xffff) * (b >> 16))
+ ((b & 0xffff) * (a >> 16)));
tsc->lo = ((tsc->hi & 0xffff) << 16) | (tsc->lo & 0xffff);
tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16);
}
void udelay(u32 us)
{
u32 dword;