pcengines/apu2: Add timestamps to romstage
This change adds timestamps to romstage in order to keep PC Engines apu2 platform in active codebase. Change-Id: Ie0286d4982623da9d035c47df6077edaf51e5110 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/22071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -24,6 +24,7 @@
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/lapic.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <commonlib/loglevel.h>
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#include <commonlib/loglevel.h>
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#include <timestamp.h>
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#include <cpu/amd/car.h>
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#include <cpu/amd/car.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <northbridge/amd/pi/agesawrapper.h>
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#include <northbridge/amd/pi/agesawrapper.h>
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@ -56,6 +57,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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hudson_lpc_port80();
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hudson_lpc_port80();
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if (!cpu_init_detectedx && boot_cpu()) {
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if (!cpu_init_detectedx && boot_cpu()) {
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timestamp_init(timestamp_get());
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timestamp_add_now(TS_START_ROMSTAGE);
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post_code(0x30);
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post_code(0x30);
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early_lpc_init();
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early_lpc_init();
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@ -82,8 +86,15 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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post_code(0x39);
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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AGESAWRAPPER(amdinitearly);
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timestamp_add_now(TS_BEFORE_INITRAM);
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post_code(0x40);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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AGESAWRAPPER(amdinitpost);
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/* FIXME: Detect if TSC frequency changed during raminit? */
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timestamp_rescale_table(1, 4);
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timestamp_add_now(TS_AFTER_INITRAM);
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}
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}
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void agesa_postcar(struct sysinfo *cb)
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void agesa_postcar(struct sysinfo *cb)
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