Revert "vboot2: add verstage"

This reverts commit 320647abda, because it
introduced the following regression.

	$ LANG=C make V=1
	Warning: no suitable GCC for arm.
	Warning: no suitable GCC for aarch64.
	Warning: no suitable GCC for riscv.
	/bin/sh: --: invalid option
	Usage: /bin/sh [GNU long option] [option] ...
	/bin/sh [GNU long option] [option] script-file ...
	GNU long options:
	--debug
	--debugger
	--dump-po-strings
	--dump-strings
	--help
	--init-file
	--login
	--noediting
	--noprofile
	--norc
	--posix
	--rcfile
	--restricted
	--verbose
	--version
	Shell options:
	-ilrsD or -c command or -O shopt_option (invocation only)
	-abefhkmnptuvxBCHP or -o option
	make: -print-libgcc-file-name: Command not found

It also introduced trailing whitespace.

Change-Id: I50ec00a38e24c854fa926357cd24f9286bf4f66f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8223
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

Makefile.inc

@@ -75,7 +75,7 @@ subdirs-y += site-local
 
 #######################################################################
 # Add source classes and their build options
-classes-y := ramstage romstage bootblock smm smmstub cpu_microcode verstage
+classes-y := ramstage romstage bootblock smm smmstub cpu_microcode
 
 # Add dynamic classes for rmodules
 $(foreach supported_arch,$(ARCH_SUPPORTED), \
@@ -128,8 +128,6 @@ ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \
 	$(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_ramstage) -o $$@ -r $$^ ) \
 	$(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs))))
 
-verstage-c-ccopts:=-D__PRE_RAM__ -D__VER_STAGE__
-verstage-S-ccopts:=-D__PRE_RAM__ -D__VER_STAGE__
 romstage-c-ccopts:=-D__PRE_RAM__
 romstage-S-ccopts:=-D__PRE_RAM__
 ifeq ($(CONFIG_TRACE),y)
@@ -164,7 +162,6 @@ endif
 
 ramstage-c-deps:=$$(OPTION_TABLE_H)
 romstage-c-deps:=$$(OPTION_TABLE_H)
-verstage-c-deps:=$$(OPTION_TABLE_H)
 bootblock-c-deps:=$$(OPTION_TABLE_H)
 smm-c-deps:=$$(OPTION_TABLE_H)
 
@@ -377,10 +374,6 @@ $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) $(romstage-c-ccopts) -c -o $@ $<
 
-$(obj)/%.verstage.o $(abspath $(obj))/%.verstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_verstage) -MMD $(CFLAGS_verstage) $(verstage-c-ccopts) -c -o $@ $<
-
 $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<

src/arch/arm/Kconfig

@@ -3,10 +3,6 @@ config ARCH_BOOTBLOCK_ARM
 	default n
 	select ARCH_ARM
 
-config ARCH_VERSTAGE_ARM
-  bool
-  default n
-
 config ARCH_ROMSTAGE_ARM
 	bool
 	default n

src/arch/arm/Makefile.inc

@@ -61,7 +61,7 @@ bootblock-y += memcpy.S
 bootblock-y += memmove.S
 bootblock-y += div0.c
 
-$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $$(VERSTAGE_LIB) 
+$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs)
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
 	$(LD_bootblock) --gc-sections -static -o $@ -L$(obj) --start-group $(bootblock-objs) --end-group -T $(src)/arch/arm/bootblock.ld
 

src/arch/arm/armv7/Kconfig

@@ -2,10 +2,6 @@ config ARCH_BOOTBLOCK_ARMV7
 	def_bool n
 	select ARCH_BOOTBLOCK_ARM
 
-config ARCH_VERSTAGE_ARMV7
-	def_bool n
-	select ARCH_VERSTAGE_ARM
-
 config ARCH_ROMSTAGE_ARMV7
 	def_bool n
 	select ARCH_ROMSTAGE_ARM

src/soc/nvidia/tegra124/Kconfig

@@ -2,7 +2,6 @@ config SOC_NVIDIA_TEGRA124
 	bool
 	default n
 	select ARCH_BOOTBLOCK_ARMV4
-	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select HAVE_UART_SPECIAL

src/soc/nvidia/tegra124/Makefile.inc

@@ -20,8 +20,6 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
 endif
 
-verstage-y += verstage.c
-
 romstage-y += cbfs.c
 romstage-y += cbmem.c
 romstage-y += clock.c

src/soc/nvidia/tegra124/bootblock.c

@@ -23,13 +23,10 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
+
 #include "pinmux.h"
 #include "power.h"
 
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
-#include "verstage.h"
-#endif
-
 void main(void)
 {
 	void *entry;
@@ -75,11 +72,7 @@ void main(void)
 	power_enable_cpu_rail();
 	power_ungate_cpu();
 
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
-	entry = (void *)verstage_vboot_main;
-#else
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
-#endif
 
 	if (entry)
 		clock_cpu0_config_and_reset(entry);

src/soc/nvidia/tegra124/verstage.c

@@ -1,9 +0,0 @@
-#include "verstage.h"
-
-/**
- * Stage entry point
- */
-void vboot_main(void)
-{
-	for(;;);
-}

src/soc/nvidia/tegra124/verstage.h

@@ -1,2 +0,0 @@
-void vboot_main(void);
-void verstage_vboot_main(void);

src/vendorcode/google/chromeos/Kconfig

@@ -85,14 +85,6 @@ config VBOOT_VERIFY_FIRMWARE
 	  Enabling VBOOT_VERIFY_FIRMWARE will use vboot to verify the ramstage
 	  and boot loader.
 
-config VBOOT2_VERIFY_FIRMWARE
-  bool "Firmware Verification with vboot2"
-  default n
-  depends on CHROMEOS
-  help
-	  Enabling VBOOT2_VERIFY_FIRMWARE will use vboot2 to verify the romstage
-	  and boot loader.
-
 config EC_SOFTWARE_SYNC
 	bool "Enable EC software sync"
 	default n

src/vendorcode/google/chromeos/Makefile.inc

@@ -93,12 +93,3 @@ $(VB_LIB):
 		fwlib
 
 endif
-
-ifeq ($(CONFIG_VBOOT2_VERIFY_FIRMWARE),y)
-VERSTAGE_LIB = $(obj)/vendorcode/google/chromeos/verstage.a
-$(VERSTAGE_LIB): $$(verstage-objs)
-	@printf "    AR         $(subst $(obj)/,,$(@))\n"
-	$(AR_verstage) rc $@.tmp $(verstage-objs)
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY_verstage) --prefix-symbols=verstage_ $@.tmp $@
-endif

toolchain.inc

@@ -51,7 +51,7 @@ HOSTCXX:=CCC_CXX="$(HOSTCXX)" $(CXX)
 ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC)
 endif
 
-COREBOOT_STANDARD_STAGES := bootblock verstage romstage ramstage
+COREBOOT_STANDARD_STAGES := bootblock romstage ramstage
 
 ARCHDIR-i386    := x86
 ARCHDIR-x86_32  := x86