google/eve: Apply default AC/DC loadline settings

Set the AC and DC loadline values based on the KBL-Y 2+2 defaults
that are applied by FSP.  These will be tuned later and are exposed
as defaults so the engineers know what to start with.

BUG=b:36228330
BRANCH=none
TEST=Build and boot on Eve and check debug FSP output to ensure that
it is applying the provided loadline values

Change-Id: Ieae4f2b201d8210e75bdb9438070a3a2e1fda6b7
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18820
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Duncan Laurie 2017-03-14 16:42:33 -07:00
parent 86db469871
commit 57e9e3be5f
1 changed files with 10 additions and 0 deletions

View File

@ -74,6 +74,8 @@ chip soc/intel/skylake
#| ImonOffset | 0 | 0 | 0 | 0 | #| ImonOffset | 0 | 0 | 0 | 0 |
#| IccMax | 4A | 24A | 24A | 24A | #| IccMax | 4A | 24A | 24A | 24A |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
#| AcLoadline | 17.9 | 5.9 | 5.7 | 5.7 |
#| DcLoadline | 14 | 4.7 | 4.2 | 4.2 |
#+----------------+-------+-------+-------+-------+ #+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1, .vr_config_enable = 1,
@ -86,6 +88,8 @@ chip soc/intel/skylake
.imon_offset = 0x0, .imon_offset = 0x0,
.icc_max = VR_CFG_AMP(4), .icc_max = VR_CFG_AMP(4),
.voltage_limit = 1520, .voltage_limit = 1520,
.ac_loadline = 1790,
.dc_loadline = 1400,
}" }"
register "domain_vr_config[VR_IA_CORE]" = "{ register "domain_vr_config[VR_IA_CORE]" = "{
@ -99,6 +103,8 @@ chip soc/intel/skylake
.imon_offset = 0x0, .imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24), .icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520, .voltage_limit = 1520,
.ac_loadline = 590,
.dc_loadline = 470,
}" }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{ register "domain_vr_config[VR_GT_UNSLICED]" = "{
@ -112,6 +118,8 @@ chip soc/intel/skylake
.imon_offset = 0x0, .imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24), .icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520, .voltage_limit = 1520,
.ac_loadline = 570,
.dc_loadline = 420,
}" }"
register "domain_vr_config[VR_GT_SLICED]" = "{ register "domain_vr_config[VR_GT_SLICED]" = "{
@ -125,6 +133,8 @@ chip soc/intel/skylake
.imon_offset = 0x0, .imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24), .icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520, .voltage_limit = 1520,
.ac_loadline = 570,
.dc_loadline = 420,
}" }"
# Enable Root port 1 with SRCCLKREQ1# # Enable Root port 1 with SRCCLKREQ1#