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mb/google/corsola: configure GPIOs 

Configure Chromebook specific GPIOs, including EC_AP_INT,
EC_IN_RW, GSC_AP_INT, EN_SPK, GPIO_AP, and GPIO_RESET.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I76bde75788889111c0a051eed731dadc9898c0e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-11-17 15:50:38 +08:00 committed by Felix Held
parent 9234d9231b
commit 580150de46
3 changed files with 42 additions and 1 deletions
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3
src/mainboard/google/corsola/bootblock.c
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@ -4,7 +4,10 @@
#include <device/mmio.h>
#include <soc/spi.h>
#include "gpio.h"
void bootblock_mainboard_init(void)
{
mtk_snfc_init(SPI_NOR_GPIO_SET0);
setup_chromeos_gpios();
}

21
src/mainboard/google/corsola/chromeos.c
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@ -2,10 +2,29 @@
#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <gpio.h>
#include "gpio.h"
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(GPIO_EC_AP_INT);
gpio_input_pullup(GPIO_EC_IN_RW);
gpio_input_pullup(GPIO_GSC_AP_INT);
gpio_output(GPIO_EN_SPK, 0);
gpio_output(GPIO_RESET, 0);
}
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_EC_AP_INT.id, ACTIVE_LOW, -1, "EC interrupt"},
{GPIO_EC_IN_RW.id, ACTIVE_LOW, -1, "EC in RW"},
{GPIO_GSC_AP_INT.id, ACTIVE_HIGH, -1, "TPM interrupt"},
{GPIO_EN_SPK.id, ACTIVE_HIGH, -1, "speaker enable"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
int get_recovery_mode_switch(void)

19
src/mainboard/google/corsola/gpio.h Normal file
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@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __MAINBOARD_GOOGLE_CORSOLA_GPIO_H__
#define __MAINBOARD_GOOGLE_CORSOLA_GPIO_H__
#include <soc/gpio.h>
#define GPIO_EC_AP_INT GPIO(EINT13)
#define GPIO_WP GPIO(EINT16)
#define GPIO_BEEP_ON GPIO(PERIPHERAL_EN4)
#define GPIO_XHCI_DONE GPIO(PERIPHERAL_EN1)
#define GPIO_EC_IN_RW GPIO(EINT14)
#define GPIO_GSC_AP_INT GPIO(EINT15)
#define GPIO_EN_SPK GPIO(PERIPHERAL_EN3)
#define GPIO_RESET GPIO(PERIPHERAL_EN0)
void setup_chromeos_gpios(void);
#endif