soc/amd/cezanne/include: replace PICASSO with CEZANNE in include guards

Somehow missed renaming those when creating the coreboot support for
Cezanne.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I13c28f67d32ba987987cfc2b45e248d535ccdca9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-11-02 19:12:20 +01:00
parent 28a0a14b5b
commit 5807da4729
2 changed files with 6 additions and 6 deletions

View File

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef AMD_PICASSO_PLATFORM_DESCRIPTORS_H
#define AMD_PICASSO_PLATFORM_DESCRIPTORS_H
#ifndef AMD_CEZANNE_PLATFORM_DESCRIPTORS_H
#define AMD_CEZANNE_PLATFORM_DESCRIPTORS_H
#include <types.h>
#include <platform_descriptors.h>
@ -14,4 +14,4 @@ void mainboard_get_dxio_ddi_descriptors(
void mb_pre_fspm(void);
#endif /* AMD_PICASSO_PLATFORM_DESCRIPTORS_H */
#endif /* AMD_CEZANNE_PLATFORM_DESCRIPTORS_H */

View File

@ -1,11 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef AMD_PICASSO_UART_H
#define AMD_PICASSO_UART_H
#ifndef AMD_CEZANNE_UART_H
#define AMD_CEZANNE_UART_H
#include <types.h>
void set_uart_config(unsigned int idx); /* configure hardware of FCH UART selected by idx */
void clear_uart_legacy_config(void); /* disable legacy I/O decode for FCH UART */
#endif /* AMD_PICASSO_UART_H */
#endif /* AMD_CEZANNE_UART_H */