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src/southbridge: Add spaces around '=='

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Change-Id: Ic81601cef841076a7548ccb3bdf0ed1b5420873e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS 2018-04-26 09:57:07 +02:00 committed by Felix Held
parent 963d312e62
commit 581fe58b8a
9 changed files with 14 additions and 14 deletions
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4
src/southbridge/intel/common/smihandler.c
View file

@ -234,11 +234,11 @@ em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
/* Check for Synchronous IO (bit0==1) */
/* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
/* Make sure it was a write (bit4==0) */
/* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;

2
src/southbridge/intel/common/usb_debug.c
View file

@ -30,7 +30,7 @@ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
if (!IS_ENABLED(CONFIG_HAVE_USBDEBUG_OPTIONS))
return PCI_DEV(0, 0x1d, 7);
if (hcd_idx==2)
if (hcd_idx == 2)
dev = PCI_DEV(0, 0x1a, 0);
else
dev = PCI_DEV(0, 0x1d, 0);

4
src/southbridge/intel/fsp_bd82x6x/smihandler.c
View file

@ -411,11 +411,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
/* Check for Synchronous IO (bit0==1) */
/* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
/* Make sure it was a write (bit4==0) */
/* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;

4
src/southbridge/intel/fsp_i89xx/smihandler.c
View file

@ -411,11 +411,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
/* Check for Synchronous IO (bit0==1) */
/* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
/* Make sure it was a write (bit4==0) */
/* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;

4
src/southbridge/intel/ibexpeak/smihandler.c
View file

@ -514,11 +514,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
/* Check for Synchronous IO (bit0==1) */
/* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
/* Make sure it was a write (bit4==0) */
/* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;

2
src/southbridge/intel/lynxpoint/early_usb.c
View file

@ -20,7 +20,7 @@
#include <device/pci_def.h>
#include "pch.h"
/* HCD_INDEX==2 selects 0:1a.0 (PCH_EHCI2), any other index
/* HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index
* selects 0:1d.0 (PCH_EHCI1) for usbdebug use.
*/
#if CONFIG_USBDEBUG_HCD_INDEX != 2

4
src/southbridge/intel/lynxpoint/smihandler.c
View file

@ -221,11 +221,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
for (node = 0; node < CONFIG_MAX_CPUS; node++) {
state = smm_get_save_state(node);
/* Check for Synchronous IO (bit0==1) */
/* Check for Synchronous IO (bit0 == 1) */
if (!(state->io_misc_info & (1 << 0)))
continue;
/* Make sure it was a write (bit4==0) */
/* Make sure it was a write (bit4 == 0) */
if (state->io_misc_info & (1 << 4))
continue;

2
src/southbridge/nvidia/mcp55/nic.c
View file

@ -42,7 +42,7 @@ static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg)
write32(base + 0x190, (phy_addr << 5) | (phy_reg));
do {
dword = read32(base + 0x190);
if (--loop==0)
if (--loop == 0)
return -4;
} while ((dword & (1 << 15)));

2
src/southbridge/sis/sis966/sis966.c
View file

@ -70,7 +70,7 @@ void sis966_enable(device_t dev)
conf = dev->chip_info;
int i;
if (dev->device==0x0000) {
if (dev->device == 0x0000) {
reg = pci_read_config32(dev, PCI_VENDOR_ID);
deviceid = (reg >> 16) & 0xffff;
vendorid = reg & 0xffff;