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mb/google/hatch: Pull up GPP_C13 for hatch and hatch_whl 

On EC end, we want to change this pin from push-pull to open-drain.
And since there is no external pull-up resistor on the board, we'll
have to configure this pin as internal-pull-up on AP end.

BUG=b:129306003
TEST=None

Change-Id: Ibc1f89fc25773220db009c6571400b01390dd756
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Philip Chen 2019-04-11 22:27:08 -07:00 committed by Patrick Georgi
parent 0987e43aa0
commit 5849b14705
5 changed files with 69 additions and 1 deletions
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2
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -428,7 +428,7 @@ static const struct pad_config s5_sleep_gpio_table[] = {
PAD_CFG_GPO(GPP_A18, 0, DEEP), /* EN_PP3300_WWAN */
};
const struct pad_config * __weak variant_sleep_gpio_table(
const struct pad_config *__weak variant_sleep_gpio_table(
u8 slp_typ, size_t *num)
{
if (slp_typ == ACPI_S5) {

2
src/mainboard/google/hatch/variants/hatch/Makefile.inc
View File

@ -18,3 +18,5 @@ SPD_SOURCES += 8G_2400 # 0b010
SPD_SOURCES += 8G_2666 # 0b011
SPD_SOURCES += 16G_2400 # 0b100
SPD_SOURCES += 16G_2666 # 0b101
ramstage-y += gpio.c

32
src/mainboard/google/hatch/variants/hatch/gpio.c Normal file
View File

@ -0,0 +1,32 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2019 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = {
/* C13 : EC_PCH_INT_L
* TODO Configure it back to invert mode, when
* ITSS IPCx configuration is fixed in FSP.
*/
PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, NONE)};
const struct pad_config *override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
}

2
src/mainboard/google/hatch/variants/hatch_whl/Makefile.inc
View File

@ -18,3 +18,5 @@ SPD_SOURCES += empty_ddr4 # 0b010
SPD_SOURCES += empty_ddr4 # 0b011
SPD_SOURCES += empty_ddr4 # 0b100
SPD_SOURCES += 8G_2666 # 0b101
ramstage-y += gpio.c

32
src/mainboard/google/hatch/variants/hatch_whl/gpio.c Normal file
View File

@ -0,0 +1,32 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2019 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = {
/* C13 : EC_PCH_INT_L
* TODO Configure it back to invert mode, when
* ITSS IPCx configuration is fixed in FSP.
*/
PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, NONE)};
const struct pad_config *override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
}