mb/google/volteer/variants/drobit: Configure USB2 port for Type-C

USB2 ports assigned to type-C connector need to be configured properly
by the USB2_PORT_TYPE_C. and also modify the description of USB port.

BUG=b:177480902
BRANCH=firmware-volteer-13672.B
TEST=emerge-volteer coreboot chromeos-bootimage
     build Pass
     And check the typeC port function is normal by manual.

Signed-off-by: Wayne3_Wang <Wayne3_Wang@pegatron.corp-partner.google.com>
Change-Id: I9e962f8cd76e1986700821168594c50bc21553e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50217
Reviewed-by: Wayne3 Wang <wayne3_wang@pegatron.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wayne3_Wang 2021-02-02 18:20:03 +08:00 committed by Tim Wawrzynczak
parent ed6bda2818
commit 585f4d46cc
1 changed files with 7 additions and 4 deletions

View File

@ -21,6 +21,9 @@ chip soc/intel/tigerlake
.tdp_pl4 = 105,
}"
register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC0)" # Type-C port 1
register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC3)" # Type-C port 0
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
@ -178,7 +181,7 @@ chip soc/intel/tigerlake
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "desc" = ""USB3 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device ref tcss_usb3_port2 on
@ -192,13 +195,13 @@ chip soc/intel/tigerlake
chip drivers/usb/acpi
device ref xhci_root_hub on
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(1, 1)"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "desc" = ""USB2 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref usb2_port4 on
@ -223,7 +226,7 @@ chip soc/intel/tigerlake
device ref usb2_port10 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device ref usb3_port1 on end