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samus: GPIO updates for Proto1b 

Move NFC_INT to GPIO9
Swap CODEC_INT to GPIO46 and WLAN_DISABLE_L to GPIO42
Swap ACCEL_INT to GPIO45 and PP1800_CODEC_EN to GPIO43
Enable PP1800_CODEC_EN, CODEC_LDOENA, CODEC_RESET_L

Old-Change-Id: I5547d34f1b7953808375aa5fe5e0a9640ae7e05e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175291
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5bb4bc59e37ee4fe9a0556e08a53402c822e5bd6)

samus: Misc fixes from proto1b bringup

- NFC interrupt is expected in the kernel as a GPIO now,
so set it back to that type
- NFC FW update GPIO should be low
- Accel/Codec interrupts were still set as GPIO type,
they should be set as PIRQ type

Old-Change-Id: I354c848ae7b158943f4745872b82a49e17e67e2f
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176513
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 75a0944f320c80618f12732a23344ce40010a688)

Squashed two small patches for samus.

Change-Id: I7ec56191fe2b7f19e470df175ad0bbe320a442f5
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6852
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2013-10-31 11:31:20 -07:00 committed by Isaac Christensen
parent 91b30d364a
commit 587193d461
2 changed files with 17 additions and 17 deletions
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18
src/mainboard/google/samus/gpio.h
View File

@ -32,7 +32,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */
LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */
LP_GPIO_ACPI_SCI, /* 8: PCH_LTE_WAKE_L */ LP_GPIO_ACPI_SCI, /* 8: PCH_LTE_WAKE_L */
LP_GPIO_UNUSED, /* 9: UNUSED */ LP_GPIO_IRQ_EDGE, /* 9: NFC_INT (GPIO IRQ) */
LP_GPIO_ACPI_SCI, /* 10: PCH_WLAN_WAKE_L */ LP_GPIO_ACPI_SCI, /* 10: PCH_WLAN_WAKE_L */
LP_GPIO_UNUSED, /* 11: UNUSED */ LP_GPIO_UNUSED, /* 11: UNUSED */
LP_GPIO_UNUSED, /* 12: UNUSED */ LP_GPIO_UNUSED, /* 12: UNUSED */
@ -51,7 +51,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_INPUT, /* 25: EC_IN_RW */ LP_GPIO_INPUT, /* 25: EC_IN_RW */
LP_GPIO_OUT_HIGH, /* 26: NFC_EN */ LP_GPIO_OUT_HIGH, /* 26: NFC_EN */
LP_GPIO_UNUSED, /* 27: UNUSED */ LP_GPIO_UNUSED, /* 27: UNUSED */
LP_GPIO_IRQ_EDGE, /* 29: NFC_INT (GPIO IRQ) */ LP_GPIO_UNUSED, /* 28: UNUSED */
LP_GPIO_UNUSED, /* 29: UNUSED */ LP_GPIO_UNUSED, /* 29: UNUSED */
LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */
LP_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */ LP_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */
@ -65,11 +65,11 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 39: UNUSED */ LP_GPIO_UNUSED, /* 39: UNUSED */
LP_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */ LP_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */
LP_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */ LP_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */
LP_GPIO_IRQ_EDGE, /* 42: CODEC_INT_L (GPIO IRQ) */ LP_GPIO_OUT_HIGH, /* 42: WLAN_DISABLE_L */
LP_GPIO_IRQ_EDGE, /* 43: ACCEL_INT (GPIO IRQ) */ LP_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */
LP_GPIO_OUT_LOW, /* 44: CODEC_LDOENA (DISABLED FOR BRINGUP) */ LP_GPIO_OUT_HIGH, /* 44: CODEC_LDOENA */
LP_GPIO_OUT_LOW, /* 45: PP1800_CODEC_EN (DISABLED FOR BRINGUP) */ LP_GPIO_PIRQ, /* 45: ACCEL_INT (PIRQW) */
LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ LP_GPIO_PIRQ, /* 46: CODEC_INT_L (PIRQO) */
LP_GPIO_PIRQ, /* 47: ACCEL_GYRO_INT (PIRQP) */ LP_GPIO_PIRQ, /* 47: ACCEL_GYRO_INT (PIRQP) */
LP_GPIO_UNUSED, /* 48: UNUSED */ LP_GPIO_UNUSED, /* 48: UNUSED */
LP_GPIO_INPUT, /* 49: HDMI_CEC */ LP_GPIO_INPUT, /* 49: HDMI_CEC */
@ -80,14 +80,14 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_UNUSED, /* 54: UNUSED */ LP_GPIO_UNUSED, /* 54: UNUSED */
LP_GPIO_UNUSED, /* 55: UNUSED */ LP_GPIO_UNUSED, /* 55: UNUSED */
LP_GPIO_UNUSED, /* 56: UNUSED */ LP_GPIO_UNUSED, /* 56: UNUSED */
LP_GPIO_OUT_LOW, /* 57: CODEC_RESET_L (DISABLED FOR BRINGUP) */ LP_GPIO_OUT_HIGH, /* 57: CODEC_RESET_L */
LP_GPIO_UNUSED, /* 58: UNUSED */ LP_GPIO_UNUSED, /* 58: UNUSED */
LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */
LP_GPIO_UNUSED, /* 60: UNUSED */ LP_GPIO_UNUSED, /* 60: UNUSED */
LP_GPIO_NATIVE, /* 61: NATIVE: PCH_SUS_STAT */ LP_GPIO_NATIVE, /* 61: NATIVE: PCH_SUS_STAT */
LP_GPIO_NATIVE, /* 62: NATIVE: PCH_SUSCLK */ LP_GPIO_NATIVE, /* 62: NATIVE: PCH_SUSCLK */
LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */
LP_GPIO_OUT_HIGH, /* 64: NFC_FW_UPDATE */ LP_GPIO_OUT_LOW, /* 64: NFC_FW_UPDATE */
LP_GPIO_INPUT, /* 65: MINIDP_PWR_FLT_L */ LP_GPIO_INPUT, /* 65: MINIDP_PWR_FLT_L */
LP_GPIO_OUT_HIGH, /* 66: MINIDP_PWR_EN */ LP_GPIO_OUT_HIGH, /* 66: MINIDP_PWR_EN */
LP_GPIO_INPUT, /* 67: RAM_ID0 */ LP_GPIO_INPUT, /* 67: RAM_ID0 */

16
src/mainboard/google/samus/onboard.h
View File

@ -40,23 +40,23 @@
#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4b #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4b
#define BOARD_CODEC_NAME "codec" #define BOARD_CODEC_NAME "codec"
#define BOARD_CODEC_IRQ GPIO_INTERRUPT(42) #define BOARD_CODEC_IRQ 30 /* PIRQO */
#define BOARD_CODEC_IRQ_TYPE BOARD_GPIO_INTERRUPT #define BOARD_CODEC_IRQ_TYPE BOARD_PIRQ_INTERRUPT
#define BOARD_CODEC_WAKE_GPIO 42 /* GPIO42 */ #define BOARD_CODEC_WAKE_GPIO 46 /* GPIO46 */
#define BOARD_CODEC_I2C_BUS 1 /* I2C0 */ #define BOARD_CODEC_I2C_BUS 1 /* I2C0 */
#define BOARD_CODEC_I2C_ADDR 0x1a #define BOARD_CODEC_I2C_ADDR 0x1a
#define BOARD_NFC_NAME "nfc" #define BOARD_NFC_NAME "nfc"
#define BOARD_NFC_IRQ GPIO_INTERRUPT(29) #define BOARD_NFC_IRQ GPIO_INTERRUPT(9)
#define BOARD_NFC_IRQ_TYPE BOARD_GPIO_INTERRUPT #define BOARD_NFC_IRQ_TYPE BOARD_GPIO_INTERRUPT
#define BOARD_NFC_WAKE_GPIO 29 /* GPIO29 */ #define BOARD_NFC_WAKE_GPIO 9 /* GPIO9 */
#define BOARD_NFC_I2C_BUS 1 /* I2C0 */ #define BOARD_NFC_I2C_BUS 1 /* I2C0 */
#define BOARD_NFC_I2C_ADDR 0x28 #define BOARD_NFC_I2C_ADDR 0x28
#define BOARD_ACCEL_NAME "accel" #define BOARD_ACCEL_NAME "accel"
#define BOARD_ACCEL_IRQ GPIO_INTERRUPT(43) #define BOARD_ACCEL_IRQ 29 /* PIRQN */
#define BOARD_ACCEL_IRQ_TYPE BOARD_GPIO_INTERRUPT #define BOARD_ACCEL_IRQ_TYPE BOARD_PIRQ_INTERRUPT
#define BOARD_ACCEL_WAKE_GPIO 43 /* GPIO43 */ #define BOARD_ACCEL_WAKE_GPIO 45 /* GPIO45 */
#define BOARD_ACCEL_I2C_BUS 2 /* I2C1 */ #define BOARD_ACCEL_I2C_BUS 2 /* I2C1 */
#define BOARD_ACCEL_I2C_ADDR 0x0e #define BOARD_ACCEL_I2C_ADDR 0x0e