payloads/libpayload: add MTK_TIMER_V2 config

The timer structure (in particular, the offset to memory addresses)
on recent MTK SoCs for example MT8195 has been changed.

BUG=b:195274787

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ifd6ff65a825c4309c47f3b115b80a8ecd42fedac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56845
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Rex-BC Chen 2021-08-05 23:51:28 +08:00 committed by Hung-Te Lin
parent 257eb1354e
commit 5889f02032
1 changed files with 6 additions and 0 deletions

View File

@ -45,6 +45,9 @@ config TIMER_RK3399
config TIMER_MTK
bool "Timer for MediaTek"
config TIMER_MTK_V2
bool "Timer for MediaTek V2"
endchoice
config TIMER_GENERIC_HZ
@ -53,6 +56,7 @@ config TIMER_GENERIC_HZ
default 6250000 if TIMER_IPQ806X
default 24000000 if TIMER_MCT
default 13000000 if TIMER_MTK
default 13000000 if TIMER_MTK_V2
default 24000000 if TIMER_RK3288
default 24000000 if TIMER_RK3399
default 1000000 if TIMER_TEGRA_1US
@ -67,6 +71,7 @@ config TIMER_GENERIC_REG
default 0x0200A028 if TIMER_IPQ806X
default 0x101C0100 if TIMER_MCT
default 0x10008068 if TIMER_MTK
default 0x100080A8 if TIMER_MTK_V2
default 0xff810028 if TIMER_RK3288
default 0xff850008 if TIMER_RK3399
default 0x60005010 if TIMER_TEGRA_1US
@ -79,6 +84,7 @@ config TIMER_GENERIC_HIGH_REG
default 0x004A2004 if TIMER_IPQ40XX
default 0x101C0104 if TIMER_MCT
default 0x10008078 if TIMER_MTK
default 0x100080B0 if TIMER_MTK_V2
default 0xff81002C if TIMER_RK3288
default 0xff85000C if TIMER_RK3399
default 0x0