mb/intel/coffeelake_rvp: do UART pad configuration at board-level

UART pad configuration should not be done in common code, because that
may cause short circuits, when the user sets a wrong UART index. Thus,
add the corresponding pads to the early UART gpio table for the board as
a first step. Common UART pad config code then gets dropped in CB:48829.

Also switch to `bootblock_mainboard_early_init` to configure the pads in
early bootblock before console initialization, to make the console work
as early as possible. The board does not do any other gpio configuration
in bootblock, so this should not influence behaviour in a negative way
(e.g. breaking overrides).

Change-Id: Ib827e9b2919dbd0e16f30b8dfde46348365d9622
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49438
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/intel/coffeelake_rvp/bootblock.c

@@ -4,7 +4,7 @@
 #include <bootblock_common.h>
 #include <soc/gpio.h>
 
-void bootblock_mainboard_init(void)
+void bootblock_mainboard_early_init(void)
 {
 	const struct pad_config *pads;
 	size_t num;

src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c

@@ -107,8 +107,14 @@ static const struct pad_config gpio_table[] = {
 	/* C17 : I2C0_SCL */
 	/* C18 : I2C1_SDA */
 	/* C19 : I2C1_SCL */
+
+	/*
+	 * Note: It's unconfirmed if this redundancy to the bootblock table is necessary.
+	 */
 	/* C20 : UART2_RXD */
+	PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
 	/* C21 : UART2_TXD */
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
 	/* C22 : UART2_RTSB */
 	/* C23 : UART2_CTSB */
 
@@ -579,6 +585,10 @@ static const struct pad_config gpio_table[] = {
 
 /* Early pad configuration in bootblock */
 static const struct pad_config early_gpio_table[] = {
+	/* C20 : UART2_RXD */
+	PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
+	/* C21 : UART2_TXD */
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
 };
 
 const struct pad_config *__weak variant_gpio_table(size_t *num)