GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/intel/d510mo: enable ACPI resume from S3 

Replace ram_check with quick_ram_check, because ram_check is slow and
is destructive for dram content.

Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19416
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Arthur Heymans 2017-04-21 16:23:30 +02:00 committed by Martin Roth
parent d2ca9d12dc
commit 58ab3bed82
2 changed files with 16 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/intel/d510mo/Kconfig
View File

@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627THG
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_1024
select MAINBOARD_HAS_NATIVE_VGA_INIT
select INTEL_INT15

20
src/mainboard/intel/d510mo/romstage.c
View File

@ -103,6 +103,7 @@ void mainboard_romstage_entry(unsigned long bist)
const u8 spd_addrmap[4] = { 0x50, 0x51, 0, 0 };
int cbmem_was_initted;
int s3resume = 0;
int boot_path;
if (bist == 0)
enable_lapic();
@ -124,15 +125,24 @@ void mainboard_romstage_entry(unsigned long bist)
post_code(0x30);
s3resume = southbridge_detect_s3_resume();
if (s3resume) {
boot_path = BOOT_PATH_RESUME;
} else {
if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
boot_path = BOOT_PATH_RESET;
else
boot_path = BOOT_PATH_NORMAL;
}
printk(BIOS_DEBUG, "Initializing memory\n");
if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
sdram_initialize(BOOT_PATH_RESET, spd_addrmap);
else
sdram_initialize(BOOT_PATH_NORMAL, spd_addrmap);
sdram_initialize(boot_path, spd_addrmap);
printk(BIOS_DEBUG, "Memory initialized\n");
post_code(0x31);
ram_check(0x200000,0x300000);
quick_ram_check();
rcba_config();