nb/gm45: allow use of 352M preallocated ram for igd

The datasheets on gm45: "Mobile Intel® 4 Series Express Chipset Family"
mention the possibility of having 352M ram preallocated for the
integrated graphic device. This only worked fine if the amount of ram in
the system was 3GB or less. When 4G or more is installed, memory is
remapped to create a 1GB large pci mmio hole which is not enough and
creates conflicts when 352M vram is used.

This patch increases the pci mmio hole size on Lenovo x200 to allow
352M vram to work.

TEST: build and flash on target with 4GB ram or more, use nvramtool to
set gfx_uma_size to 352M and reboot.

Change-Id: I5ab066252339ac7d85149d91b09a9eaaaab3b5b6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16831
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Arthur Heymans 2016-09-30 21:03:23 +02:00 committed by Martin Roth
parent 5e0242b0ec
commit 58afca4a1a
5 changed files with 5 additions and 2 deletions

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@ -139,6 +139,7 @@ enumerations
11 9 96M
11 10 160M
11 11 224M
11 12 352M
12 0 Integrated Only
12 1 Discrete Only

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@ -136,6 +136,7 @@ enumerations
11 9 96M
11 10 160M
11 11 224M
11 12 352M
# -----------------------------------------------------------------
checksums

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@ -28,7 +28,7 @@ chip northbridge/intel/gm45
end
end
register "pci_mmio_size" = "1024"
register "pci_mmio_size" = "2048"
device domain 0 on
device pci 00.0 on

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@ -124,6 +124,7 @@ enumerations
11 9 96M
11 10 160M
11 11 224M
11 12 352M
# -----------------------------------------------------------------
checksums

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@ -157,7 +157,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo)
gfxsize = 4;
}
/* Handle invalid cmos settings */
if (gfxsize > 11)
if (gfxsize > 12)
gfxsize = 4;
sysinfo->ggc = 0x0300 | ((gfxsize + 1) << 4);
if (!(capid & (1 << (48 - 32))))