mainboard/google/nocturne: Enable IPU3

Enable Image Processing Unit and CIO2 device that constitute IPU3.

BUG=None
TEST=Build and boot up into Nocturne platform and check with lspci.

Change-Id: Ic2edf5ec7bde5c55ce1b13cf7b680094a9fffc6a
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://review.coreboot.org/27124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Lijian Zhao 2018-06-15 15:50:32 -07:00 committed by Patrick Georgi
parent e78af97349
commit 58f68e80ec
1 changed files with 2 additions and 2 deletions

View File

@ -40,8 +40,8 @@ chip soc/intel/skylake
register "EnableTraceHub" = "0"
register "SsicPortEnable" = "0"
register "SmbusEnable" = "1"
register "Cio2Enable" = "0" # FIXME: enable once MIPI is ready
register "SaImguEnable" = "0" # FIXME: enable once MIPI is ready
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "0"