mb/google/brya/var/kinox: Configure TDC current

Configure TDC current for VR domains.
+-----------+-------+-------+---------+-------------+----------+
| Setting   | AC LL | DC LL | ICC MAX | TDC Current | TDC Time |
|           |(mOhms)|(mOhms)|   (A)   |     (A)     |   (msec) |
+-----------+-------+-------+---------+-------------+----------+
|    IA     |  2.8  |  2.8  |    80   |      43     |  28000   |
+-----------+-------+-------+---------+-------------+----------+
|    GT     |  3.2  |  3.2  |    40   |      23     |  28000   |
+-----------+-------+-------+---------+-------------+----------+
- IA TDC current from 20A to 43A.
- GT TDC current from 20A to 23A.
- Others comes from 'commit c6d7166942 ("soc/intel/alderlake: Configure the SKU specific parameters for VR domains")'

BUG=b:237230877
TEST=Build and boot to Chrome OS

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ie9cf8975309b57b4189e2b50f37bd61ac0105e14
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65659
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Dtrain Hsu 2022-07-05 17:50:50 +08:00 committed by Felix Held
parent 6aadb93355
commit 58f68fb0cb
1 changed files with 26 additions and 0 deletions

View File

@ -10,6 +10,32 @@ chip soc/intel/alderlake
# GPE configuration # GPE configuration
register "pmc_gpe0_dw1" = "GPP_H" register "pmc_gpe0_dw1" = "GPP_H"
# +-----------+-------+-------+---------+-------------+----------+
# | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time |
# | |(mOhms)|(mOhms)| (A) | (A) | (msec) |
# +-----------+-------+-------+---------+-------------+----------+
# | IA | 2.8 | 2.8 | 80 | 43 | 28000 |
# +-----------+-------+-------+---------+-------------+----------+
# | GT | 3.2 | 3.2 | 40 | 23 | 28000 |
# +-----------+-------+-------+---------+-------------+----------+
register "domain_vr_config[VR_DOMAIN_IA]" = "{
.vr_config_enable = 1,
.ac_loadline = 280,
.dc_loadline = 280,
.icc_max = VR_CFG_AMP(80),
.tdc_timewindow = 28000,
.tdc_currentlimit = VR_CFG_TDC_AMP(43),
}"
register "domain_vr_config[VR_DOMAIN_GT]" = "{
.vr_config_enable = 1,
.ac_loadline = 320,
.dc_loadline = 320,
.icc_max = VR_CFG_AMP(40),
.tdc_timewindow = 28000,
.tdc_currentlimit = VR_CFG_TDC_AMP(23),
}"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |