build: separate CPPFLAGS from CFLAGS
There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them. Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5765 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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2
Makefile
2
Makefile
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@ -242,7 +242,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template
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de$(EMPTY)fine $(1)-objs_$(2)_template
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$(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4)
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@printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n"
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$(CC_$(1)) $(3) -MMD $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$<
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$(CC_$(1)) $(3) -MMD $$$$(CPPFLAGS_$(1)) $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$<
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en$(EMPTY)def
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end$(EMPTY)if
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endef
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16
Makefile.inc
16
Makefile.inc
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@ -152,7 +152,7 @@ $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h
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$(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$@).asl
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cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$@)).asl
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mv $$(basename $$@).hex $$(basename $$@).c
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$(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c
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$(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c
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# keep %.o: %.c rule from catching the temporary .c file after a make clean
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mv $$(basename $$@).c $$(basename $$@).hex
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endef
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@ -214,11 +214,11 @@ ifneq ($(CONFIG_LOCALVERSION),"")
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COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION))
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endif
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CPPFLAGS := -Isrc -Isrc/include -I$(obj)
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CPPFLAGS += -Isrc/device/oprom/include
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CPPFLAGS += -include $(src)/include/kconfig.h
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CPPFLAGS_common := -Isrc -Isrc/include -I$(obj)
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CPPFLAGS_common += -Isrc/device/oprom/include
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CPPFLAGS_common += -include $(src)/include/kconfig.h
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CFLAGS_common = $(CPPFLAGS) -Os -pipe -g -nostdinc
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CFLAGS_common = -Os -pipe -g -nostdinc
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CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
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CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
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CFLAGS_common += -Wstrict-aliasing -Wshadow
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@ -314,15 +314,15 @@ $(objutil)/%.o: $(objutil)/%.c
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$(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $<
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$(CC_ramstage) -MMD $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -c -o $@ $<
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$(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $<
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$(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) $(CPPFLAGS_romstage) -c -o $@ $<
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$(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $<
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$(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -c -o $@ $<
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#######################################################################
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# Clean up rules
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@ -155,7 +155,7 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
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@printf " CC romstage.inc\n"
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$(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
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$(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
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endif # CONFIG_ARCH_ROMSTAGE_ARMV7
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@ -192,7 +192,7 @@ $(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ram
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group
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else
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$(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
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$(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
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endif
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ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
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@ -193,7 +193,7 @@ else
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
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@printf " CC romstage.inc\n"
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$(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
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$(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
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@printf " POST romstage.inc\n"
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@ -9,6 +9,6 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
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ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),)
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ifneq ($(wildcard $(shell realpath -L "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),)
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CPPFLAGS += -I$(CONFIG_MICROCODE_INCLUDE_PATH)
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CPPFLAGS_common += -I$(CONFIG_MICROCODE_INCLUDE_PATH)
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endif
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endif
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@ -22,7 +22,7 @@ romstage-y += fsp_util.c
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ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
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romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
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CPPFLAGS += -Isrc/drivers/intel/fsp
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CPPFLAGS_common += -Isrc/drivers/intel/fsp
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ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y)
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cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc
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@ -32,6 +32,6 @@ romstage-y += ../../../arch/x86/lib/walkcbfs.S
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smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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CPPFLAGS += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
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CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
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$(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h
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@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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CPPFLAGS += -Isrc/soc/intel/baytrail/
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CPPFLAGS_common += -Isrc/soc/intel/baytrail/
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# Run an intermediate step when producing coreboot.rom
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# that adds additional components to the final firmware
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@ -70,4 +70,4 @@ endif
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PHONY += bd82x6x_add_me
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CPPFLAGS += -I$(src)/southbridge/intel/fsp_bd82x6x
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CPPFLAGS_common += -I$(src)/southbridge/intel/fsp_bd82x6x
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@ -48,7 +48,7 @@ VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y))
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VB_SOURCE := vboot_reference
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# Add the vboot include paths.
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CPPFLAGS += -I$(VB_SOURCE)/firmware/include
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CPPFLAGS_common += -I$(VB_SOURCE)/firmware/include
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VBOOT_STUB_ELF = $(obj)/vendorcode/google/chromeos/vbootstub.elf
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VBOOT_STUB = $(VBOOT_STUB_ELF).rmod
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@ -64,8 +64,8 @@ OBJCOPY_$(1) := $(OBJCOPY_$(2))
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OBJDUMP_$(1) := $(OBJDUMP_$(2))
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STRIP_$(1) := $(STRIP_$(2))
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READELF_$(1) := $(READELF_$(2))
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CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include
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CFLAGS_$(1) = $$(CFLAGS_common) $$(CPPFLAGS_$(1)) $(CFLAGS_$(2))
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CFLAGS_$(1) = $$(CFLAGS_common) $$(CFLAGS_$(2))
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CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2))
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LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \
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$(CC_$(2)) -print-libgcc-file-name)
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endef
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