amd/mct/ddr3: Avoid using uninitialized register address in ECC setup
Logic inside mct_EnableDimmEccEn_D uses an unintialized variable as a register address under certain conditions. Refactor mct_EnableDimmEccEn_D to use the explicit address of the register in all cases. Found-by: Coverity Scan #1347337 Change-Id: I6bc50d0524ea255aa97c7071ec4813f6a3e9c2b8 Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/18079 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -2242,23 +2242,20 @@ void mct_EnableDimmEccEn_D(struct MCTStatStruc *pMCTstat,
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struct DCTStatStruc *pDCTstat, u8 _DisableDramECC)
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struct DCTStatStruc *pDCTstat, u8 _DisableDramECC)
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{
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{
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u32 val;
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u32 val;
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u32 reg;
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u32 dev;
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u32 dev;
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/* Enable ECC correction if it was previously disabled */
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/* Enable ECC correction if it was previously disabled */
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dev = pDCTstat->dev_dct;
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dev = pDCTstat->dev_dct;
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if ((_DisableDramECC & 0x01) == 0x01) {
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if ((_DisableDramECC & 0x01) == 0x01) {
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reg = 0x90;
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val = Get_NB32_DCT(dev, 0, 0x90);
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val = Get_NB32_DCT(dev, 0, reg);
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val |= (1<<DimmEcEn);
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val |= (1<<DimmEcEn);
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Set_NB32_DCT(dev, 0, reg, val);
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Set_NB32_DCT(dev, 0, 0x90, val);
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}
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}
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if ((_DisableDramECC & 0x02) == 0x02) {
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if ((_DisableDramECC & 0x02) == 0x02) {
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val = Get_NB32_DCT(dev, 1, reg);
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val = Get_NB32_DCT(dev, 1, 0x90);
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val |= (1<<DimmEcEn);
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val |= (1<<DimmEcEn);
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Set_NB32_DCT(dev, 1, reg, val);
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Set_NB32_DCT(dev, 1, 0x90, val);
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}
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}
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}
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}
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