google/gru: enable pp1500 and pp3000 rails as soon as possible

The idea is that they stay low unless we know that we booted from SPI
flash. As this code runs in SPI flash - it is ok to turn these rails
on as soon as possible, and pp3000 rail it is essential for UART to
work.

Kevin rev1 and Gru designs are going to be using these pins to
control these rails. Kevin rev1 had those GPIO pins routed to two
chip enable signals, it is save to assert them high.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=kevin rev0 still boots (which does not prove much)
TEST=run coreboot on kevin rev1 to kernel

Change-Id: I5f3eb4cf5d6f04a0253574dd8b5c039eab0bae1a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 987042246672e9391087dbd5060785a379dde131
Original-Change-Id: I31bb03334ad9e3aa57db726fb43dec85014a3f05
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/341543
Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-on: https://review.coreboot.org/14729
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Vadim Bendebury 2016-04-22 16:06:26 -07:00 committed by Patrick Georgi
parent 8e8a00cabf
commit 591298a575
2 changed files with 10 additions and 0 deletions

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@ -17,6 +17,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <bootblock_common.h> #include <bootblock_common.h>
#include <soc/grf.h> #include <soc/grf.h>
#include <gpio.h>
#include <soc/spi.h> #include <soc/spi.h>
#include <console/console.h> #include <console/console.h>
@ -35,6 +36,13 @@ void bootblock_mainboard_early_init(void)
*/ */
write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0)); write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0));
/*
* Let's enable these power rails here, we are already running the SPI
* Flash based code.
*/
gpio_output(GPIO(0, B, 2), 1); /* PP1500_EN */
gpio_output(GPIO(0, B, 4), 1); /* PP3000_EN */
if (IS_ENABLED(CONFIG_DRIVERS_UART)) { if (IS_ENABLED(CONFIG_DRIVERS_UART)) {
_Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE, _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
"CONSOLE_SERIAL_UART should be UART2"); "CONSOLE_SERIAL_UART should be UART2");

View File

@ -21,8 +21,10 @@ bootblock-y += ../common/spi.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif endif
bootblock-y += ../common/gpio.c
bootblock-y += bootblock.c bootblock-y += bootblock.c
bootblock-y += clock.c bootblock-y += clock.c
bootblock-y += gpio.c
bootblock-y += mmu_operations.c bootblock-y += mmu_operations.c
bootblock-y += timer.c bootblock-y += timer.c