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mb/google/brya/var/taeko4es: Fix PLD group order (W/A) 

In commit 667471b8d8 (ec/google/chromeec: Add PLD to EC conn in ACPI
table), PLD is added to ACPI table. It causes the DUT to not boot into
the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2
to solve this issue.

Fixes: 667471b8d8 ("ec/google/chromeec: Add PLD to EC conn in ACPI table")
BUG=b:209723556
BRANCH=none
TEST=build coreboot and boot into OS.

Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: Iff1302fa758bcde1ce8b03c16f7cc6eac807e5c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60187
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Joey Peng 2021-12-17 12:52:43 +08:00 committed by Felix Held
parent 0afecdf95a
commit 591789b50b
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/taeko4es/overridetree.cb
View File

@ -445,7 +445,7 @@ chip soc/intel/alderlake
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)"" register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)" register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref tcss_usb3_port3 on device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A probe DB_USB DB_USB3_NO_A
end end
@ -465,7 +465,7 @@ chip soc/intel/alderlake
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)"" register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)" register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref usb2_port3 on device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A probe DB_USB DB_USB3_NO_A
end end