more fix for vsm, not working yet
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -32,7 +32,8 @@ bug573(void){
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#endif
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#endif
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static void
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static void
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pcideadlock(void){
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pcideadlock(void)
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{
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msr_t msr;
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msr_t msr;
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msr = rdmsr(CPU_DM_CONFIG0);
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msr = rdmsr(CPU_DM_CONFIG0);
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@ -41,13 +42,11 @@ pcideadlock(void){
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msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
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msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
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wrmsr(CPU_DM_CONFIG0, msr);
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wrmsr(CPU_DM_CONFIG0, msr);
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msr = rdmsr(CPU_IM_CONFIG);
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msr = rdmsr(CPU_IM_CONFIG);
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msr.lo |= IM_CONFIG_LOWER_QWT_SET; /* interlock instruction fetches to WS regions with data accesses.
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msr.lo |= IM_CONFIG_LOWER_QWT_SET; /* interlock instruction fetches to WS regions with data accesses.
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* This prevents in instruction fetch from going out to PCI if the
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* This prevents in instruction fetch from going out to PCI if the
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* data side is about to make a request.
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* data side is about to make a request.
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*/
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*/
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wrmsr(CPU_IM_CONFIG, msr);
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wrmsr(CPU_IM_CONFIG, msr);
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/* write serialize memory hole to PCI. Need to to unWS when something is shadowed regardless of cachablility.*/
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/* write serialize memory hole to PCI. Need to to unWS when something is shadowed regardless of cachablility.*/
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@ -72,13 +71,14 @@ pcideadlock(void){
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/***/
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/***/
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/****************************************************************************/
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/****************************************************************************/
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void bug784(void){
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void bug784(void)
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{
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msr_t msr;
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msr_t msr;
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// static char *name = "Geode by NSC";
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//static char *name = "Geode by NSC";
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/* we'll do this the stupid way, for now, but that's the string they want. NO ONE KNOWS why you
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/* we'll do this the stupid way, for now, but that's the string they want. NO ONE KNOWS why you
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* would do this -- the OS can figure this type of stuff out!
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* would do this -- the OS can figure this type of stuff out!
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*/
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*/
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msr = rdmsr(0x3006);
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msr = rdmsr(0x3006);
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msr.hi = 0x646f6547;
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msr.hi = 0x646f6547;
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wrmsr(0x3006, msr);
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wrmsr(0x3006, msr);
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@ -91,7 +91,7 @@ void bug784(void){
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msr = rdmsr(0x3002);
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msr = rdmsr(0x3002);
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wrmsr(0x3008, msr);
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wrmsr(0x3008, msr);
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/* More CPUID to match AMD better. #792*/
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/* More CPUID to match AMD better. #792*/
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msr = rdmsr(0x3009);
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msr = rdmsr(0x3009);
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msr.hi = 0x0C0C0A13D;
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msr.hi = 0x0C0C0A13D;
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msr.lo = 0x00000000;
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msr.lo = 0x00000000;
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@ -99,8 +99,8 @@ void bug784(void){
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}
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}
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/* cpubug 1398: enable MC if we KNOW we have DDR*/
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/* cpubug 1398: enable MC if we KNOW we have DDR*/
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void
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void eng1398(void)
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eng1398(void){
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{
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msr_t msr;
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msr_t msr;
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msr = rdmsr(MSR_GLCP+0x17);
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msr = rdmsr(MSR_GLCP+0x17);
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@ -199,7 +199,9 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
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//" mov %ax, %gs \n"
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//" mov %ax, %gs \n"
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" mov $0x40, %ax \n"
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" mov $0x40, %ax \n"
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" mov %ax, %ds \n"
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" mov %ax, %ds \n"
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" mov %cx, %ax \n"
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//" mov %cx, %ax \n"
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" movl $0x10000026, %ecx \n"
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" movl $0x10000028, %edx \n"
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/* run VGA BIOS at 0x6000:0020 */
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/* run VGA BIOS at 0x6000:0020 */
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" lcall $0x6000, $0x0020\n"
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" lcall $0x6000, $0x0020\n"
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@ -275,6 +277,9 @@ void do_vsmbios(void)
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memcpy((void *) 0x60000, buf, size);
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memcpy((void *) 0x60000, buf, size);
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for (i = 0; i < 0x800000; i++)
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outb(0xaa, 0x80);
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/* ecx gets smm, edx gets sysm */
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/* ecx gets smm, edx gets sysm */
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printk_err("Call real_mode_switch_call_vsm\n");
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printk_err("Call real_mode_switch_call_vsm\n");
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real_mode_switch_call_vsm(0x10000026, 0x10000028);
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real_mode_switch_call_vsm(0x10000026, 0x10000028);
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@ -124,6 +124,16 @@ static void msr_init(void)
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__builtin_wrmsr(0x50002001, 0x27, 0x0);
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__builtin_wrmsr(0x50002001, 0x27, 0x0);
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__builtin_wrmsr(0x4c002001, 0x1, 0x0);
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__builtin_wrmsr(0x4c002001, 0x1, 0x0);
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#if 1
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__builtin_wrmsr(0x4c00000c, 0x0, 0x08);
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__builtin_wrmsr(0x4c000016, 0x0, 0x0);
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__builtin_wrmsr(0x4c00000c, 0x1, 0x0);
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__builtin_wrmsr(0x4c00005e, 0x03880000, 0x00);
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__builtin_wrmsr(0x4c00006f, 0x0000f000, 0x00);
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__builtin_wrmsr(0x4c00005f, 0x08000000, 0x00);
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__builtin_wrmsr(0x4c00000d, 0x82b5ad68, 0x80ad6b57);
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__builtin_wrmsr(0x4c00000c, 0x0, 0x0);
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#endif
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}
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}
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@ -171,7 +171,7 @@ setup_gx2(void)
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sizem = setup_gx2_cache();
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sizem = setup_gx2_cache();
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membytes = sizem * 1048576;
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membytes = sizem * 1048576;
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#if 0
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/* we need to set 0x10000028 and 0x40000029 */
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/* we need to set 0x10000028 and 0x40000029 */
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printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes);
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printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes);
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msr.hi = 0x20000000 | membytes>>24;
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msr.hi = 0x20000000 | membytes>>24;
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@ -201,7 +201,28 @@ setup_gx2(void)
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msr.hi = tmp;
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msr.hi = tmp;
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msr.lo = tmp2;
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msr.lo = tmp2;
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wrmsr(0x10000026, msr);
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wrmsr(0x10000026, msr);
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#else
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msr.hi = 0x2000000f;
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msr.lo = 0xfbf00100;
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wrmsr(0x10000028, msr);
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msr = rdmsr(0x10000028);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000028, msr.hi, msr.lo);
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wrmsr(0x40000029, msr);
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msr = rdmsr(0x40000029);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi, msr.lo);
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msr.hi = 0x2cfbc040;
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msr.lo = 0x400fffc0;
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wrmsr(0x10000026, msr);
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msr = rdmsr(0x10000026);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, msr.hi, msr.lo);
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msr.hi = 0x22fffc02;
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msr.lo = 0x10ffbf00;
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wrmsr(0x1808, msr);
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msr = rdmsr(0x1808);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x1808, msr.hi, msr.lo);
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#endif
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/* now do the default MSR values */
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/* now do the default MSR values */
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for(i = 0; msr_defaults[i].msr_no; i++) {
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for(i = 0; msr_defaults[i].msr_no; i++) {
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msr_t msr;
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msr_t msr;
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