more fix for vsm, not working yet

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo 2006-04-06 20:19:04 +00:00
parent 8854d30d6e
commit 5917c62749
4 changed files with 51 additions and 15 deletions

View File

@ -32,7 +32,8 @@ bug573(void){
#endif #endif
static void static void
pcideadlock(void){ pcideadlock(void)
{
msr_t msr; msr_t msr;
msr = rdmsr(CPU_DM_CONFIG0); msr = rdmsr(CPU_DM_CONFIG0);
@ -41,13 +42,11 @@ pcideadlock(void){
msr.lo |= DM_CONFIG0_LOWER_MISSER_SET; msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
wrmsr(CPU_DM_CONFIG0, msr); wrmsr(CPU_DM_CONFIG0, msr);
msr = rdmsr(CPU_IM_CONFIG); msr = rdmsr(CPU_IM_CONFIG);
msr.lo |= IM_CONFIG_LOWER_QWT_SET; /* interlock instruction fetches to WS regions with data accesses. msr.lo |= IM_CONFIG_LOWER_QWT_SET; /* interlock instruction fetches to WS regions with data accesses.
* This prevents in instruction fetch from going out to PCI if the * This prevents in instruction fetch from going out to PCI if the
* data side is about to make a request. * data side is about to make a request.
*/ */
wrmsr(CPU_IM_CONFIG, msr); wrmsr(CPU_IM_CONFIG, msr);
/* write serialize memory hole to PCI. Need to to unWS when something is shadowed regardless of cachablility.*/ /* write serialize memory hole to PCI. Need to to unWS when something is shadowed regardless of cachablility.*/
@ -72,13 +71,14 @@ pcideadlock(void){
/***/ /***/
/****************************************************************************/ /****************************************************************************/
void bug784(void){ void bug784(void)
{
msr_t msr; msr_t msr;
// static char *name = "Geode by NSC"; //static char *name = "Geode by NSC";
/* we'll do this the stupid way, for now, but that's the string they want. NO ONE KNOWS why you /* we'll do this the stupid way, for now, but that's the string they want. NO ONE KNOWS why you
* would do this -- the OS can figure this type of stuff out! * would do this -- the OS can figure this type of stuff out!
*/ */
msr = rdmsr(0x3006); msr = rdmsr(0x3006);
msr.hi = 0x646f6547; msr.hi = 0x646f6547;
wrmsr(0x3006, msr); wrmsr(0x3006, msr);
@ -91,7 +91,7 @@ void bug784(void){
msr = rdmsr(0x3002); msr = rdmsr(0x3002);
wrmsr(0x3008, msr); wrmsr(0x3008, msr);
/* More CPUID to match AMD better. #792*/ /* More CPUID to match AMD better. #792*/
msr = rdmsr(0x3009); msr = rdmsr(0x3009);
msr.hi = 0x0C0C0A13D; msr.hi = 0x0C0C0A13D;
msr.lo = 0x00000000; msr.lo = 0x00000000;
@ -99,8 +99,8 @@ void bug784(void){
} }
/* cpubug 1398: enable MC if we KNOW we have DDR*/ /* cpubug 1398: enable MC if we KNOW we have DDR*/
void void eng1398(void)
eng1398(void){ {
msr_t msr; msr_t msr;
msr = rdmsr(MSR_GLCP+0x17); msr = rdmsr(MSR_GLCP+0x17);

View File

@ -199,7 +199,9 @@ static void real_mode_switch_call_vsm(unsigned long smm, unsigned long sysm)
//" mov %ax, %gs \n" //" mov %ax, %gs \n"
" mov $0x40, %ax \n" " mov $0x40, %ax \n"
" mov %ax, %ds \n" " mov %ax, %ds \n"
" mov %cx, %ax \n" //" mov %cx, %ax \n"
" movl $0x10000026, %ecx \n"
" movl $0x10000028, %edx \n"
/* run VGA BIOS at 0x6000:0020 */ /* run VGA BIOS at 0x6000:0020 */
" lcall $0x6000, $0x0020\n" " lcall $0x6000, $0x0020\n"
@ -275,6 +277,9 @@ void do_vsmbios(void)
memcpy((void *) 0x60000, buf, size); memcpy((void *) 0x60000, buf, size);
for (i = 0; i < 0x800000; i++)
outb(0xaa, 0x80);
/* ecx gets smm, edx gets sysm */ /* ecx gets smm, edx gets sysm */
printk_err("Call real_mode_switch_call_vsm\n"); printk_err("Call real_mode_switch_call_vsm\n");
real_mode_switch_call_vsm(0x10000026, 0x10000028); real_mode_switch_call_vsm(0x10000026, 0x10000028);

View File

@ -124,6 +124,16 @@ static void msr_init(void)
__builtin_wrmsr(0x50002001, 0x27, 0x0); __builtin_wrmsr(0x50002001, 0x27, 0x0);
__builtin_wrmsr(0x4c002001, 0x1, 0x0); __builtin_wrmsr(0x4c002001, 0x1, 0x0);
#if 1
__builtin_wrmsr(0x4c00000c, 0x0, 0x08);
__builtin_wrmsr(0x4c000016, 0x0, 0x0);
__builtin_wrmsr(0x4c00000c, 0x1, 0x0);
__builtin_wrmsr(0x4c00005e, 0x03880000, 0x00);
__builtin_wrmsr(0x4c00006f, 0x0000f000, 0x00);
__builtin_wrmsr(0x4c00005f, 0x08000000, 0x00);
__builtin_wrmsr(0x4c00000d, 0x82b5ad68, 0x80ad6b57);
__builtin_wrmsr(0x4c00000c, 0x0, 0x0);
#endif
} }

View File

@ -171,7 +171,7 @@ setup_gx2(void)
sizem = setup_gx2_cache(); sizem = setup_gx2_cache();
membytes = sizem * 1048576; membytes = sizem * 1048576;
#if 0
/* we need to set 0x10000028 and 0x40000029 */ /* we need to set 0x10000028 and 0x40000029 */
printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes); printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes);
msr.hi = 0x20000000 | membytes>>24; msr.hi = 0x20000000 | membytes>>24;
@ -201,7 +201,28 @@ setup_gx2(void)
msr.hi = tmp; msr.hi = tmp;
msr.lo = tmp2; msr.lo = tmp2;
wrmsr(0x10000026, msr); wrmsr(0x10000026, msr);
#else
msr.hi = 0x2000000f;
msr.lo = 0xfbf00100;
wrmsr(0x10000028, msr);
msr = rdmsr(0x10000028);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000028, msr.hi, msr.lo);
wrmsr(0x40000029, msr);
msr = rdmsr(0x40000029);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi, msr.lo);
msr.hi = 0x2cfbc040;
msr.lo = 0x400fffc0;
wrmsr(0x10000026, msr);
msr = rdmsr(0x10000026);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, msr.hi, msr.lo);
msr.hi = 0x22fffc02;
msr.lo = 0x10ffbf00;
wrmsr(0x1808, msr);
msr = rdmsr(0x1808);
printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x1808, msr.hi, msr.lo);
#endif
/* now do the default MSR values */ /* now do the default MSR values */
for(i = 0; msr_defaults[i].msr_no; i++) { for(i = 0; msr_defaults[i].msr_no; i++) {
msr_t msr; msr_t msr;