drivers/tpm/spi: Convert static functions to enum cb_err return types
Instead of using raw integers to indicate success/failure, enum cb_err can be used to makes things clearer, so this patch converts most functions to return that instead of int. TEST=boot to OS on google/dratini, no TPM errors seen Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ifb749c931fe008b16d42fcf157af820ec8fbf5ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/61976 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Tim Wawrzynczak
Felix Held
parent
d736fd4ea7
commit
591c7ebf18
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@ -16,9 +16,10 @@
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#include <console/console.h>
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#include <delay.h>
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#include <endian.h>
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#include <security/tpm/tis.h>
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#include <string.h>
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#include <timer.h>
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#include <security/tpm/tis.h>
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#include <types.h>
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#include "tpm.h"
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@ -86,30 +87,25 @@ __weak int tis_plat_irq_status(void)
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/*
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* TPM may trigger a IRQ after finish processing previous transfer.
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* Waiting for this IRQ to sync TPM status.
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*
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* Returns 1 on success, 0 on failure (timeout).
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*/
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static int tpm_sync(void)
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static enum cb_err tpm_sync(void)
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{
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struct stopwatch sw;
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stopwatch_init_msecs_expire(&sw, 10);
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while (!tis_plat_irq_status()) {
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if (stopwatch_expired(&sw)) {
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printk(BIOS_ERR, "Timeout wait for TPM IRQ!\n");
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return 0;
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if (stopwatch_expired(&sw))
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return CB_ERR;
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}
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}
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return 1;
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return CB_SUCCESS;
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}
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/*
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* Each TPM2 SPI transaction starts the same: CS is asserted, the 4 byte
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* header is sent to the TPM, the master waits til TPM is ready to continue.
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*
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* Returns 1 on success, 0 on failure (TPM SPI flow control timeout.)
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*/
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static int start_transaction(int read_write, size_t bytes, unsigned int addr)
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static enum cb_err start_transaction(int read_write, size_t bytes, unsigned int addr)
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{
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spi_frame_header header, header_resp;
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uint8_t byte;
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@ -128,7 +124,9 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr)
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/* Wait for TPM to finish previous transaction if needed */
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if (tpm_sync_needed) {
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tpm_sync();
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if (tpm_sync() != CB_SUCCESS)
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printk(BIOS_ERR, "Timeout waiting for TPM IRQ!\n");
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/*
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* During the first invocation of this function on each stage
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* this if () clause code does not run (as tpm_sync_needed
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@ -207,11 +205,11 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr)
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if (ret) {
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printk(BIOS_ERR, "SPI-TPM: transfer error\n");
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spi_release_bus(&spi_slave);
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return 0;
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return CB_ERR;
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}
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if (header_resp.body[3] & 1)
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return 1;
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return CB_SUCCESS;
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/*
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* Now poll the bus until TPM removes the stall bit. Give it up to 100
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@ -222,12 +220,12 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr)
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if (stopwatch_expired(&sw)) {
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printk(BIOS_ERR, "TPM flow control failure\n");
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spi_release_bus(&spi_slave);
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return 0;
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return CB_ERR;
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}
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spi_xfer(&spi_slave, NULL, 0, &byte, 1);
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} while (!(byte & 1));
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return 1;
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return CB_SUCCESS;
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}
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/*
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@ -308,48 +306,45 @@ static void read_bytes(void *buffer, size_t bytes)
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/*
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* To write a register, start transaction, transfer data to the TPM, deassert
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* CS when done.
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*
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* Returns one to indicate success, zero to indicate failure.
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*/
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static int tpm2_write_reg(unsigned int reg_number, const void *buffer, size_t bytes)
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static enum cb_err tpm2_write_reg(unsigned int reg_number, const void *buffer, size_t bytes)
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{
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trace_dump("W", reg_number, bytes, buffer, 0);
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if (!start_transaction(false, bytes, reg_number))
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return 0;
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if (start_transaction(false, bytes, reg_number) != CB_SUCCESS)
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return CB_ERR;
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write_bytes(buffer, bytes);
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spi_release_bus(&spi_slave);
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return 1;
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return CB_SUCCESS;
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}
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/*
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* To read a register, start transaction, transfer data from the TPM, deassert
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* CS when done.
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*
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* Returns one to indicate success, zero to indicate failure. In case of
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* failure zero out the user buffer.
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* In case of failure zero out the user buffer.
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*/
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static int tpm2_read_reg(unsigned int reg_number, void *buffer, size_t bytes)
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static enum cb_err tpm2_read_reg(unsigned int reg_number, void *buffer, size_t bytes)
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{
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if (!start_transaction(true, bytes, reg_number)) {
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if (start_transaction(true, bytes, reg_number) != CB_SUCCESS) {
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memset(buffer, 0, bytes);
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return 0;
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return CB_ERR;
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}
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read_bytes(buffer, bytes);
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spi_release_bus(&spi_slave);
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trace_dump("R", reg_number, bytes, buffer, 0);
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return 1;
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return CB_SUCCESS;
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}
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/*
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* Status register is accessed often, wrap reading and writing it into
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* dedicated functions.
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*/
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static int read_tpm_sts(uint32_t *status)
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static enum cb_err read_tpm_sts(uint32_t *status)
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{
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return tpm2_read_reg(TPM_STS_REG, status, sizeof(*status));
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}
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static int __must_check write_tpm_sts(uint32_t status)
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static enum cb_err __must_check write_tpm_sts(uint32_t status)
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{
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return tpm2_write_reg(TPM_STS_REG, &status, sizeof(status));
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}
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@ -383,7 +378,7 @@ static void tpm2_write_access_reg(uint8_t cmd)
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tpm2_write_reg(TPM_ACCESS_REG, &cmd, sizeof(cmd));
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}
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static int tpm2_claim_locality(void)
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static enum cb_err tpm2_claim_locality(void)
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{
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uint8_t access;
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struct stopwatch sw;
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@ -422,17 +417,18 @@ static int tpm2_claim_locality(void)
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printk(BIOS_INFO, "TPM ready after %ld ms\n",
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stopwatch_duration_msecs(&sw));
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return 1;
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return CB_SUCCESS;
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} while (!stopwatch_expired(&sw));
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printk(BIOS_ERR,
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"Failed to claim locality 0 after %ld ms, status: %#x\n",
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stopwatch_duration_msecs(&sw), access);
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return 0;
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return CB_ERR;
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}
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static int cr50_parse_fw_version(const char *version_str, struct cr50_firmware_version *ver)
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static enum cb_err cr50_parse_fw_version(const char *version_str,
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struct cr50_firmware_version *ver)
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{
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int epoch, major, minor;
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@ -440,33 +436,33 @@ static int cr50_parse_fw_version(const char *version_str, struct cr50_firmware_v
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if (!number)
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number = strstr(version_str, " RW_B:");
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if (!number)
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return -1;
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return CB_ERR_ARG;
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number += 6; /* Skip past the colon. */
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epoch = skip_atoi(&number);
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if (*number++ != '.')
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return -2;
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return CB_ERR_ARG;
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major = skip_atoi(&number);
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if (*number++ != '.')
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return -2;
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return CB_ERR_ARG;
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minor = skip_atoi(&number);
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ver->epoch = epoch;
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ver->major = major;
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ver->minor = minor;
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return 0;
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return CB_SUCCESS;
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}
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static int cr50_fw_supports_board_cfg(struct cr50_firmware_version *version)
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static bool cr50_fw_supports_board_cfg(struct cr50_firmware_version *version)
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{
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/* Cr50 supports the CR50_BOARD_CFG register from version 0.5.5 / 0.6.5
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* and onwards. */
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if (version->epoch > 0 || version->major >= 7
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|| (version->major >= 5 && version->minor >= 5))
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return 1;
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return true;
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printk(BIOS_INFO, "Cr50 firmware does not support CR50_BOARD_CFG, version: %d.%d.%d\n",
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version->epoch, version->major, version->minor);
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return 0;
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return false;
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}
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/**
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@ -478,7 +474,8 @@ static void cr50_set_board_cfg(void)
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if (!cr50_fw_supports_board_cfg(&cr50_firmware_version))
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return;
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/* Set the CR50_BOARD_CFG register, for e.g. asking cr50 to use longer ready pulses. */
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if (!tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))) {
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if (tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))
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!= CB_SUCCESS) {
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printk(BIOS_INFO, "Error reading from cr50\n");
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return;
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}
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@ -499,7 +496,8 @@ static void cr50_set_board_cfg(void)
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printk(BIOS_INFO, "Current CR50_BOARD_CFG = 0x%08x, setting to 0x%08x\n",
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board_cfg_value, CR50_BOARD_CFG_VALUE);
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board_cfg_value = CR50_BOARD_CFG_VALUE;
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if (!tpm2_write_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value)))
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if (tpm2_write_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))
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!= CB_SUCCESS)
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printk(BIOS_INFO, "Error writing to cr50\n");
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}
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@ -512,7 +510,9 @@ static uint32_t cr50_get_board_cfg(void)
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uint32_t board_cfg_value;
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if (!cr50_fw_supports_board_cfg(&cr50_firmware_version))
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return 0;
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if (!tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))) {
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if (tpm2_read_reg(CR50_BOARD_CFG, &board_cfg_value, sizeof(board_cfg_value))
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!= CB_SUCCESS) {
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printk(BIOS_INFO, "Error reading from cr50\n");
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return 0;
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}
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@ -530,7 +530,7 @@ static const uint32_t supported_did_vids[] = {
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0x0000104a /* ST33HTPH2E32 */
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};
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static int first_access_this_boot(void)
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static bool first_access_this_boot(void)
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{
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return ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK || !CONFIG(VBOOT);
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}
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@ -584,10 +584,10 @@ int tpm2_init(struct spi_slave *spi_if)
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* Claim locality 0, do it only during the first
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* initialization after reset.
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*/
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if (!tpm2_claim_locality())
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if (tpm2_claim_locality() != CB_SUCCESS)
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return -1;
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if (!read_tpm_sts(&status)) {
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if (read_tpm_sts(&status) != CB_SUCCESS) {
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printk(BIOS_ERR, "Reading status reg failed\n");
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return -1;
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}
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@ -635,7 +635,8 @@ int tpm2_init(struct spi_slave *spi_if)
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} while (chunk_count * chunk_size < sizeof(version_str) - chunk_size);
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version_str[chunk_count * chunk_size] = '\0';
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printk(BIOS_INFO, "Firmware version: %s\n", version_str);
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if (cr50_parse_fw_version(version_str, &cr50_firmware_version)) {
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if (cr50_parse_fw_version(version_str, &cr50_firmware_version) != CB_SUCCESS) {
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printk(BIOS_ERR, "Did not recognize Cr50 version format\n");
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return -1;
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}
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@ -650,12 +651,9 @@ int tpm2_init(struct spi_slave *spi_if)
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/*
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* This is in seconds, certain TPM commands, like key generation, can take
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* long time to complete.
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*
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* Returns one to indicate success, zero (not yet implemented) to indicate
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* failure.
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*/
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#define MAX_STATUS_TIMEOUT 120
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static int wait_for_status(uint32_t status_mask, uint32_t status_expected)
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static enum cb_err wait_for_status(uint32_t status_mask, uint32_t status_expected)
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{
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uint32_t status;
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struct stopwatch sw;
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@ -666,12 +664,12 @@ static int wait_for_status(uint32_t status_mask, uint32_t status_expected)
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if (stopwatch_expired(&sw)) {
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printk(BIOS_ERR, "failed to get expected status %x\n",
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status_expected);
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return false;
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return CB_ERR;
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}
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read_tpm_sts(&status);
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} while ((status & status_mask) != status_expected);
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return 1;
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return CB_SUCCESS;
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}
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enum fifo_transfer_direction {
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@ -689,7 +687,7 @@ union fifo_transfer_buffer {
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* Transfer requested number of bytes to or from TPM FIFO, accounting for the
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* current burst count value.
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*/
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static int __must_check fifo_transfer(size_t transfer_size,
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static enum cb_err __must_check fifo_transfer(size_t transfer_size,
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union fifo_transfer_buffer buffer,
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enum fifo_transfer_direction direction)
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{
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@ -713,22 +711,22 @@ static int __must_check fifo_transfer(size_t transfer_size,
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transaction_size = MIN(transaction_size, 64);
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if (direction == fifo_receive) {
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if (!tpm2_read_reg(TPM_DATA_FIFO_REG,
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if (tpm2_read_reg(TPM_DATA_FIFO_REG,
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buffer.rx_buffer + handled_so_far,
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transaction_size))
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return 0;
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transaction_size) != CB_SUCCESS)
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return CB_ERR;
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} else {
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if (!tpm2_write_reg(TPM_DATA_FIFO_REG,
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if (tpm2_write_reg(TPM_DATA_FIFO_REG,
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buffer.tx_buffer + handled_so_far,
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transaction_size))
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return 0;
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transaction_size) != CB_SUCCESS)
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return CB_ERR;
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}
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handled_so_far += transaction_size;
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} while (handled_so_far != transfer_size);
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return 1;
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return CB_SUCCESS;
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}
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size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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@ -761,7 +759,7 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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}
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/* Let the TPM know that the command is coming. */
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if (!write_tpm_sts(TPM_STS_COMMAND_READY)) {
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if (write_tpm_sts(TPM_STS_COMMAND_READY) != CB_SUCCESS) {
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printk(BIOS_ERR, "TPM_STS_COMMAND_READY failed\n");
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return 0;
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}
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@ -778,21 +776,21 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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* burst count or the maximum PDU size, whatever is smaller.
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*/
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fifo_buffer.tx_buffer = cmd_body;
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if (!fifo_transfer(command_size, fifo_buffer, fifo_transmit)) {
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if (fifo_transfer(command_size, fifo_buffer, fifo_transmit) != CB_SUCCESS) {
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printk(BIOS_ERR, "fifo_transfer %zd command bytes failed\n",
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command_size);
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return 0;
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}
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/* Now tell the TPM it can start processing the command. */
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if (!write_tpm_sts(TPM_STS_GO)) {
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if (write_tpm_sts(TPM_STS_GO) != CB_SUCCESS) {
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printk(BIOS_ERR, "TPM_STS_GO failed\n");
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return 0;
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}
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/* Now wait for it to report that the response is ready. */
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expected_status_bits = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
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if (!wait_for_status(expected_status_bits, expected_status_bits)) {
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if (wait_for_status(expected_status_bits, expected_status_bits) != CB_SUCCESS) {
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/*
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* If timed out, which should never happen, let's at least
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* print out the offending command.
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@ -831,7 +829,7 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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*/
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bytes_to_go = payload_size - 1 - HEADER_SIZE;
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fifo_buffer.rx_buffer = rsp_body + HEADER_SIZE;
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if (!fifo_transfer(bytes_to_go, fifo_buffer, fifo_receive)) {
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if (fifo_transfer(bytes_to_go, fifo_buffer, fifo_receive) != CB_SUCCESS) {
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printk(BIOS_ERR, "fifo_transfer %zd receive bytes failed\n",
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bytes_to_go);
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return 0;
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@ -860,7 +858,7 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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}
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/* Move the TPM back to idle state. */
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if (!write_tpm_sts(TPM_STS_COMMAND_READY)) {
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if (write_tpm_sts(TPM_STS_COMMAND_READY) != CB_SUCCESS) {
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printk(BIOS_ERR, "TPM_STS_COMMAND_READY failed\n");
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return 0;
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}
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