Move the CPU specific includes from

src/arch/i386/Makefile.inc to the respective CPU directories.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-04-12 15:28:34 +00:00
parent 09f6718dda
commit 5934b507d5
17 changed files with 35 additions and 78 deletions

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@ -117,61 +117,17 @@ ldscripts += $(src)/arch/i386/lib/id.lds
endif
crt0s += $(src)/cpu/x86/fpu_enable.inc
ifeq ($(CONFIG_CPU_AMD_GX1),y)
crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc
crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc
endif
ifeq ($(CONFIG_SSE),y)
crt0s += $(src)/cpu/x86/sse_enable.inc
endif
ifeq ($(CONFIG_CPU_AMD_LX),y)
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2R2),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y)
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_INTEL_ATOM_230),y)
crt0s += $(src)/cpu/intel/model_106cx/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_INTEL_CORE),y)
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
endif
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y)
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_INTEL_SOCKET_MFCBGA479),y)
crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
endif
ifeq ($(CONFIG_CPU_VIA_C7),y)
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
endif
# who else could use this?
crt0s += $(cpu_incs)
#
# FIXME move to CPU_INTEL_SOCKET_MPGA604
#
ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
ldscripts += $(src)/cpu/x86/car/cache_as_ram.lds
endif
ifeq ($(CONFIG_LLSHELL),y)

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@ -23,3 +23,6 @@ subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
driver-y += model_gx1_init.o
cpu_incs += $(src)/cpu/amd/model_gx1/cpu_setup.inc
cpu_incs += $(src)/cpu/amd/model_gx1/gx_setup.inc

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@ -6,3 +6,5 @@ subdirs-y += ../../x86/smm
driver-y += model_lx_init.o
obj-y += cpubug.o
obj-y += vsmsetup.o
cpu_incs += $(src)/cpu/amd/model_lx/cache_as_ram.inc

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@ -8,3 +8,5 @@ subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

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@ -8,3 +8,5 @@ subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

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@ -8,3 +8,5 @@ subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

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@ -9,3 +9,5 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

View File

@ -9,3 +9,5 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
subdirs-y += ../../x86/mtrr
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

View File

@ -9,3 +9,5 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

View File

@ -9,3 +9,5 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

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@ -10,3 +10,4 @@ subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm
subdirs-y += ../../x86/mtrr
cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc

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@ -8,3 +8,5 @@ subdirs-y += ../../x86/smm
subdirs-y += ../microcode
subdirs-y += ../hyperthreading
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc

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@ -1 +1,3 @@
driver-y += model_106cx_init.o
cpu_incs += $(src)/cpu/intel/model_106cx/cache_as_ram.inc

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@ -1 +1,3 @@
driver-y += model_6ex_init.o
cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc

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@ -6,3 +6,5 @@ subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
subdirs-y += ../microcode
cpu_incs += $(src)/cpu/x86/car/cache_as_ram.inc

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@ -6,3 +6,5 @@ subdirs-y += ../../x86/smm
subdirs-y += ../../intel/microcode
driver-y += model_c7_init.o
cpu_incs += $(src)/cpu/via/car/cache_as_ram.inc

View File

@ -1,29 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2004 Stefan Reinauer
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
SECTIONS {
.init . : {
_init = .;
*(.init.text);
*(.init.rodata);
*(.init.rodata.*);
. = ALIGN(16);
_einit = .;
}
}