mb/google/skyrim/var/frostflow: Add FW_CONFIG definition
Based on the SKU plan, add FW_CONFIG definition. BUG=b:260473966 BRANCH=None TEST=emerge-skyrim coreboot chromeos-bootimage Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Change-Id: I727f69e8fe340cfe624adb5a49bd080ba9544786 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70418 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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# SPDX-License-Identifier: GPL-2.0-or-later
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# SPDX-License-Identifier: GPL-2.0-or-later
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fw_config
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field FP 0
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option FP_ABSENT 0
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option FP_PRESENT 1
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end
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field STYLUS 1
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option STYLUS_ABSENT 0
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option STYLUS_PRESENT 1
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end
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end
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chip soc/amd/mendocino
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chip soc/amd/mendocino
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# Set Package Power Parameters
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# Set Package Power Parameters
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@ -75,7 +85,9 @@ chip soc/amd/mendocino
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register "key.label" = ""pen_eject""
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register "key.label" = ""pen_eject""
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register "key.debounce_interval" = "100"
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register "key.debounce_interval" = "100"
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register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
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register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
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device generic 0 on end
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device generic 0 on
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probe STYLUS STYLUS_PRESENT
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end
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end
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end
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end # I2C1
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end # I2C1
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device ref i2c_2 on
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device ref i2c_2 on
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@ -118,7 +130,9 @@ chip soc/amd/mendocino
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)"
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register "enable_delay_ms" = "3"
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register "enable_delay_ms" = "3"
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device generic 0 alias fpmcu on end
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device generic 0 alias fpmcu on
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probe FP FP_PRESENT
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end
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end
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end
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end # UART1
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end # UART1
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