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mb/google/skyrim/var/frostflow: Add FW_CONFIG definition 

Based on the SKU plan, add FW_CONFIG definition.

BUG=b:260473966
BRANCH=None
TEST=emerge-skyrim coreboot chromeos-bootimage

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I727f69e8fe340cfe624adb5a49bd080ba9544786
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70418
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Wu 2022-12-06 17:22:55 +08:00 committed by Felix Held
parent ff433b7176
commit 593ac8d749
1 changed files with 16 additions and 2 deletions
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18
src/mainboard/google/skyrim/variants/frostflow/overridetree.cb
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@ -1,4 +1,14 @@
# SPDX-License-Identifier: GPL-2.0-or-later
fw_config
field FP 0
option FP_ABSENT 0
option FP_PRESENT 1
end
field STYLUS 1
option STYLUS_ABSENT 0
option STYLUS_PRESENT 1
end
end
chip soc/amd/mendocino
# Set Package Power Parameters
@ -75,7 +85,9 @@ chip soc/amd/mendocino
register "key.label" = ""pen_eject""
register "key.debounce_interval" = "100"
register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
device generic 0 on end
device generic 0 on
probe STYLUS STYLUS_PRESENT
end
end
end # I2C1
device ref i2c_2 on
@ -118,7 +130,9 @@ chip soc/amd/mendocino
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)"
register "enable_delay_ms" = "3"
device generic 0 alias fpmcu on end
device generic 0 alias fpmcu on
probe FP FP_PRESENT
end
end
end # UART1