nb/intel/sandybridge: Clean up TC_OTHP writes
ODT stretch is configured for both slots in `dram_odt_stretch`. Also drop an unjustified OR, which is setting ODT stretch for one slot. Tested on Asus P8H61-M PRO, still boots. Change-Id: I3a9076afec96e33cfdd12f9b78ca4101b3776dab Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47490 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
59996e0377
commit
593f4ca10b
|
@ -142,7 +142,7 @@ static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
|
||||||
|
|
||||||
void dram_timing_regs(ramctr_timing *ctrl)
|
void dram_timing_regs(ramctr_timing *ctrl)
|
||||||
{
|
{
|
||||||
u32 reg, addr, val32;
|
u32 reg, val32;
|
||||||
int channel;
|
int channel;
|
||||||
|
|
||||||
FOR_ALL_CHANNELS {
|
FOR_ALL_CHANNELS {
|
||||||
|
@ -169,14 +169,13 @@ void dram_timing_regs(ramctr_timing *ctrl)
|
||||||
MCHBAR32(TC_RAP_ch(channel)) = reg;
|
MCHBAR32(TC_RAP_ch(channel)) = reg;
|
||||||
|
|
||||||
/* Other parameters */
|
/* Other parameters */
|
||||||
addr = TC_OTHP_ch(channel);
|
|
||||||
reg = 0;
|
reg = 0;
|
||||||
reg |= (ctrl->tXPDLL << 0);
|
reg |= (ctrl->tXPDLL << 0);
|
||||||
reg |= (ctrl->tXP << 5);
|
reg |= (ctrl->tXP << 5);
|
||||||
reg |= (ctrl->tAONPD << 8);
|
reg |= (ctrl->tAONPD << 8);
|
||||||
reg |= 0xa0000;
|
reg |= 0xa0000;
|
||||||
printram("OTHP [%x] = %x\n", addr, reg);
|
printram("OTHP [%x] = %x\n", TC_OTHP_ch(channel), reg);
|
||||||
MCHBAR32(addr) = reg;
|
MCHBAR32(TC_OTHP_ch(channel)) = reg;
|
||||||
|
|
||||||
/* Debug parameters - only applies to Ivy Bridge */
|
/* Debug parameters - only applies to Ivy Bridge */
|
||||||
if (IS_IVY_CPU(ctrl->cpu)) {
|
if (IS_IVY_CPU(ctrl->cpu)) {
|
||||||
|
@ -195,8 +194,6 @@ void dram_timing_regs(ramctr_timing *ctrl)
|
||||||
MCHBAR32(TC_DTP_ch(channel)) = reg;
|
MCHBAR32(TC_DTP_ch(channel)) = reg;
|
||||||
}
|
}
|
||||||
|
|
||||||
MCHBAR32_OR(addr, 0x00020000);
|
|
||||||
|
|
||||||
dram_odt_stretch(ctrl, channel);
|
dram_odt_stretch(ctrl, channel);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
Loading…
Reference in New Issue