Revert "Remove code that enables/disables VMX in coreboot on chromebooks."
The MSR for VMX can start with a random value and needs to be cleared by coreboot. I am reverting this change, as it handles almost everything and doing a follow-on change to fix the improper clearing of the MSR. Change-Id: Ibad7a27b03f199241c52c1ebdd2b6d4e81a18a4e Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/1793 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -28,6 +28,10 @@ config SMM_TSEG_SIZE
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hex
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default 0x800000
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config ENABLE_VMX
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bool "Enable VMX for virtualization"
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default n
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config MICROCODE_INCLUDE_PATH
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string
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default "src/cpu/intel/model_206ax"
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@ -43,6 +43,7 @@ static void msr_set_bit(unsigned reg, unsigned bit)
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void intel_model_206ax_finalize_smm(void)
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{
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msr_set_bit(IA32_FEATURE_CONTROL, 0);
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msr_set_bit(MSR_PMG_CST_CONFIG_CONTROL, 15);
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/* Lock AES-NI only if supported */
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@ -116,6 +116,41 @@ static acpi_cstate_t cstate_map[] = {
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{ 0 }
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};
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static void enable_vmx(void)
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{
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struct cpuid_result regs;
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msr_t msr;
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int enable = CONFIG_ENABLE_VMX;
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msr = rdmsr(IA32_FEATURE_CONTROL);
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if (msr.lo & (1 << 0)) {
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printk(BIOS_ERR, "VMX is locked, so enable_vmx will do nothing\n");
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/* VMX locked. If we set it again we get an illegal
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* instruction
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*/
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return;
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}
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regs = cpuid(1);
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printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling");
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if (regs.ecx & CPUID_VMX) {
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if (enable)
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msr.lo |= (1 << 2);
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else
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msr.lo &= ~(1 << 2);
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if (regs.ecx & CPUID_SMX) {
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if (enable)
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msr.lo |= (1 << 1);
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else
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msr.lo &= ~(1 << 1);
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}
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}
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wrmsr(IA32_FEATURE_CONTROL, msr);
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}
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/* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
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static const u8 power_limit_time_sec_to_msr[] = {
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[0] = 0x00,
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@ -526,6 +561,9 @@ static void model_206ax_init(device_t cpu)
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enable_lapic_tpr();
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setup_lapic();
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/* Enable virtualization if enabled in CMOS */
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enable_vmx();
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/* Configure C States */
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configure_c_states();
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