{src/include},{soc/intel): Configure HDA codecs

HDA support did not configure the codecs correclty.
Use Intel common block support to configure the codecs.

To use common Intel HDA support file hda.c file has been
removed and Braswell HDA device ID is added to list of
supported  PCI devices in intel/common/block/hda/hda.c.

CONFIG_SOC_INTEL_COMMON_BLOCK and
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA  are enabled
to include hda.c in build.

When codec table is available at board level
SOC_INTEL_COMMON_BLOCK_HDA_VERB must be enabled
and a codec table must be supplied.

BUG=N/A
TEST=Facebook FBG-1701 ALC298 configuration

Change-Id: I5c23ec311e5b5a6dfd6f031aa19617407fe8ed63
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Frans Hendriks 2019-02-28 15:16:00 +01:00 committed by Patrick Georgi
parent 8ee161daab
commit 59ae2ef4c4
5 changed files with 5 additions and 44 deletions

View File

@ -3139,6 +3139,7 @@
#define PCI_DEVICE_ID_INTEL_CNP_H_AUDIO 0xa348
#define PCI_DEVICE_ID_INTEL_ICL_AUDIO 0x34c8
#define PCI_DEVICE_ID_INTEL_CMP_AUDIO 0x02c8
#define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284
/* Intel HECI/ME device Ids */
#define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a

View File

@ -31,6 +31,8 @@ config CPU_SPECIFIC_OPTIONS
select RTC
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_RESET
select SMM_TSEG
select SMP

View File

@ -27,7 +27,6 @@ ramstage-y += gpio.c
ramstage-y += gfx.c
ramstage-y += gpio_support.c
ramstage-y += hda.c
ramstage-y += iosf.c
ramstage-y += lpe.c
ramstage-y += lpss.c

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@ -1,43 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <reg_script.h>
#include <soc/hda.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
static const struct device_operations device_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = NULL,
.enable = NULL,
.scan_bus = NULL,
.ops_pci = &soc_pci_ops,
};
static const struct pci_driver southcluster __pci_driver = {
.ops = &device_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = HDA_DEVID,
};

View File

@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Google Inc.
* Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -79,6 +80,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNP_H_AUDIO,
PCI_DEVICE_ID_INTEL_ICL_AUDIO,
PCI_DEVICE_ID_INTEL_CMP_AUDIO,
PCI_DEVICE_ID_INTEL_BSW_AUDIO,
0
};