northbridge/sch: read the size of main memory from the proper register
I don't know if the size main memory supposed to be in PCI(0,0) reg 0x9c but it is not written there. The size of memory is written in src/northbridge/intel/sch/raminit.c to SCH port(2, 8, 4) (look for "Setting up TOM"). Change-Id: Iea04a5185bda56f61d1c382533d5a0dac429ebbd Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Reviewed-on: http://review.coreboot.org/1629 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
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@ -111,10 +111,10 @@ static void pci_domain_set_resources(device_t dev)
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printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n",
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pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c));
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tolud = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), 0x9c);
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printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08llx\n", tolud << 24);
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tolud = sch_port_access_read(2, 8, 4);
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printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08llx\n", tolud);
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tomk = tolud << 14;
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tomk = tolud / 1024;
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tomk_stolen = tomk;
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/* Note: subtract IGD device and TSEG. */
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