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intel/sch: Use MMCONF_BASE_ADDRESS 

For iwave/iWRainbowG6 using intel/sch, MMCONF_BASE_ADDRESS was unused
and different from hardware setting. Change that to match hardware
programming.

Change-Id: I3324b7ea0e6f092206d4b6b791476d538e826657
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3507
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Kyösti Mälkki 2013-06-19 23:05:00 +03:00 committed by Ronald G. Minnich
parent 66a68a2af8
commit 59fb82aab1
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/iwave/iWRainbowG6/Kconfig
View File

@ -26,7 +26,7 @@ config MAINBOARD_PART_NUMBER
config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
default 0xe0000000
config IRQ_SLOT_COUNT
int

2
src/northbridge/intel/sch/sch.h
View File

@ -38,7 +38,7 @@ void sch_port_access_write_ram_cmd(int cmd, int port, int reg, int data);
#define DEFAULT_RCBABASE 0xfed1c000
#define DEFAULT_PCIEXBAR 0xe0000000 /* 4 KB per PCIe device */
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS /* 4 KB per PCIe device */
/* IGD */
#define GGC 0x52