src/southbridge/sis/sis966/nic.c: Improve code formatting
Change-Id: If4f3d3ed43fca1bff52ea99cc3eab29beb4e2a08 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25872 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS
Felix Held
parent
5be7bb3fa6
commit
5a33d12c24
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@ -31,12 +31,12 @@
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u8 SiS_SiS191_init[6][3]={
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{0x04, 0xFF, 0x07},
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{0x2C, 0xFF, 0x39},
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{0x2D, 0xFF, 0x10},
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{0x2E, 0xFF, 0x91},
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{0x2F, 0xFF, 0x01},
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{0x00, 0x00, 0x00} //End of table
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{0x04, 0xFF, 0x07},
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{0x2C, 0xFF, 0x39},
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{0x2D, 0xFF, 0x10},
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{0x2E, 0xFF, 0x91},
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{0x2F, 0xFF, 0x01},
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{0x00, 0x00, 0x00} //End of table
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};
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@ -51,15 +51,15 @@ u16 MacAddr[3];
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static void writeApcByte(int addr, u8 value)
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{
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outb(addr,0x78);
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outb(value,0x79);
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outb(addr, 0x78);
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outb(value, 0x79);
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}
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static u8 readApcByte(int addr)
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{
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u8 value;
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outb(addr,0x78);
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value=inb(0x79);
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outb(addr, 0x78);
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value = inb(0x79);
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return(value);
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}
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@ -69,22 +69,22 @@ static void readApcMacAddr(void)
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// enable APC in south bridge sis966 D2F0
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outl(0x80001048,0xcf8);
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outl((inl(0xcfc) & 0xfffffffd),0xcfc ); // enable IO78/79h for APC Index/Data
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outl(0x80001048, 0xcf8);
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outl((inl(0xcfc) & 0xfffffffd), 0xcfc ); // enable IO78/79h for APC Index/Data
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printk(BIOS_DEBUG, "MAC addr in APC = ");
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for (i = 0x9; i <=0xe; i++) {
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for (i = 0x9; i <= 0xe; i++)
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printk(BIOS_DEBUG, "%2.2x",readApcByte(i));
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}
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printk(BIOS_DEBUG, "\n");
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/* Set APC Reload */
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writeApcByte(0x7,readApcByte(0x7)&0xf7);
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writeApcByte(0x7,readApcByte(0x7)|0x0a);
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writeApcByte(0x7, readApcByte(0x7) & 0xf7);
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writeApcByte(0x7, readApcByte(0x7) | 0x0a);
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/* disable APC in south bridge */
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outl(0x80001048,0xcf8);
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outl(inl(0xcfc)&0xffffffbf,0xcfc);
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outl(0x80001048, 0xcf8);
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outl(inl(0xcfc) & 0xffffffbf, 0xcfc);
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}
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static void set_apc(struct device *dev)
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@ -94,27 +94,27 @@ static void set_apc(struct device *dev)
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u8 bTmp;
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/* enable APC in south bridge sis966 D2F0 */
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outl(0x80001048,0xcf8);
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outl((inl(0xcfc) & 0xfffffffd),0xcfc ); // enable IO78/79h for APC Index/Data
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outl(0x80001048, 0xcf8);
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outl((inl(0xcfc) & 0xfffffffd), 0xcfc ); // enable IO78/79h for APC Index/Data
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for (i = 0; i <3; i++) {
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addr=0x9+2*i;
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writeApcByte(addr,(u8)(MacAddr[i]&0xFF));
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writeApcByte(addr+1L,(u8)((MacAddr[i]>>8)&0xFF));
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// printf("%x - ",readMacAddrByte(0x59+i));
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for (i = 0; i < 3; i++) {
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addr = 0x9 + 2*i;
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writeApcByte(addr, (u8)(MacAddr[i] & 0xFF));
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writeApcByte(addr+1L, (u8)((MacAddr[i] >> 8) & 0xFF));
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// printf("%x - ", readMacAddrByte(0x59 + i));
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}
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/* Set APC Reload */
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writeApcByte(0x7,readApcByte(0x7)&0xf7);
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writeApcByte(0x7,readApcByte(0x7)|0x0a);
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writeApcByte(0x7, readApcByte(0x7) & 0xf7);
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writeApcByte(0x7, readApcByte(0x7) | 0x0a);
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/* disable APC in south bridge */
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outl(0x80001048,0xcf8);
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outl(inl(0xcfc)&0xffffffbf,0xcfc);
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outl(0x80001048, 0xcf8);
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outl(inl(0xcfc) & 0xffffffbf, 0xcfc);
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// CFG reg0x73 bit=1, tell driver MAC Address load to APC
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// CFG reg0x73 bit = 1, tell driver MAC Address load to APC
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bTmp = pci_read_config8(dev, 0x73);
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bTmp|=0x1;
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bTmp |= 0x1;
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pci_write_config8(dev, 0x73, bTmp);
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}
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@ -127,7 +127,7 @@ static void set_apc(struct device *dev)
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* @return Contents of EEPROM word (Reg).
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*/
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#define LoopNum 200
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static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg)
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static unsigned long ReadEEprom(struct device *dev, u8 *base, u32 Reg)
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{
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u32 data;
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u32 i;
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@ -139,8 +139,8 @@ static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg)
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mdelay(10);
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for (i=0; i <= LoopNum; i++) {
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ulValue=read32(base + 0x3c);
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for (i = 0; i <= LoopNum; i++) {
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ulValue = read32(base + 0x3c);
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if (!(ulValue & 0x0080)) //BIT_7
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break;
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@ -150,9 +150,10 @@ static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg)
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mdelay(50);
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if (i==LoopNum) data=0x10000;
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if (i == LoopNum)
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data = 0x10000;
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else {
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ulValue=read32(base + 0x3c);
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ulValue = read32(base + 0x3c);
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data = ((ulValue & 0xffff0000) >> 16);
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}
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@ -180,7 +181,7 @@ static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg)
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ulValue = read32(base + 0x44);
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} while ((ulValue & SMI_REQUEST) != 0);
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//printk(BIOS_DEBUG, "base %x cmd %lx ret val %lx\n", tmp,Read_Cmd,ulValue);
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usData=(ulValue>>16);
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usData = (ulValue >> 16);
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return usData;
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}
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@ -196,21 +197,20 @@ static int phy_detect(u8 *base,u16 *PhyAddr) //BOOL PHY_Detect()
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// Scan all PHY address(0 ~ 31) to find a valid PHY
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for (PhyAddress = 0; PhyAddress < 32; PhyAddress++) {
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usData=phy_read(base,PhyAddress,StatusReg); // Status register is a PHY's register(offset 01h)
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// Status register is a PHY's register(offset 01h)
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usData = phy_read(base,PhyAddress,StatusReg);
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// Found a valid PHY
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if ((usData != 0x0) && (usData != 0xffff)) {
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bFoundPhy = TRUE;
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break;
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}
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}
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if (!bFoundPhy) {
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if (!bFoundPhy)
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printk(BIOS_DEBUG, "PHY not found !!!!\n");
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}
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*PhyAddr=PhyAddress;
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*PhyAddr = PhyAddress;
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return bFoundPhy;
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}
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@ -228,7 +228,7 @@ static void nic_init(struct device *dev)
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//-------------- enable NIC (SiS19x) -------------------------
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{
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u8 temp8;
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int i=0;
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int i = 0;
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while (SiS_SiS191_init[i][0] != 0) {
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temp8 = pci_read_config8(dev, SiS_SiS191_init[i][0]);
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temp8 &= SiS_SiS191_init[i][1];
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@ -252,34 +252,35 @@ static void nic_init(struct device *dev)
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base = res2mmio(res, 0, 0);
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printk(BIOS_DEBUG, "NIC base address %p\n",base);
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if (!(val=phy_detect(base,&PhyAddr))) {
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if (!(val = phy_detect(base, &PhyAddr))) {
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printk(BIOS_DEBUG, "PHY detect fail !!!!\n");
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return;
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}
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ulValue=read32(base + 0x38L); // check EEPROM existing
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ulValue = read32(base + 0x38L); // check EEPROM existing
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if ((ulValue & 0x0002)) {
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if (ulValue & 0x0002) {
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// read MAC address from EEPROM at first
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// if that is valid we will use that
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printk(BIOS_DEBUG, "EEPROM contents %lx\n",ReadEEprom( dev, base, 0LL));
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for (i=0;i<3;i++) {
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printk(BIOS_DEBUG, "EEPROM contents %lx\n",ReadEEprom(dev, base, 0LL));
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for (i = 0; i < 3; i++) {
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//status = smbus_read_byte(dev_eeprom, i);
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ulValue=ReadEEprom( dev, base, i+3L);
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if (ulValue ==0x10000) break; // error
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ulValue = ReadEEprom(dev, base, i + 3L);
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if (ulValue == 0x10000)
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break; // error
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MacAddr[i] =ulValue & 0xFFFF;
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MacAddr[i] = ulValue & 0xFFFF;
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}
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} else {
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// read MAC address from firmware
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printk(BIOS_DEBUG, "EEPROM invalid!!\nReg 0x38h=%.8lx\n",ulValue);
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MacAddr[0]=read16((u16 *)0xffffffc0); // mac address store at here
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MacAddr[1]=read16((u16 *)0xffffffc2);
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MacAddr[2]=read16((u16 *)0xffffffc4);
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MacAddr[0] = read16((u16 *)0xffffffc0); // mac address store at here
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MacAddr[1] = read16((u16 *)0xffffffc2);
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MacAddr[2] = read16((u16 *)0xffffffc4);
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}
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set_apc(dev);
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@ -293,15 +294,14 @@ static void nic_init(struct device *dev)
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printk(BIOS_DEBUG, "****** NIC PCI config ******");
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printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C");
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for (i=0;i<0xff;i+=4) {
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if ((i%16)==0)
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for (i = 0; i < 0xff; i += 4) {
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if ((i%16) == 0)
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printk(BIOS_DEBUG, "\n%02x: ", i);
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printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i));
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printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev, i));
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}
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printk(BIOS_DEBUG, "\n");
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}
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#endif
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}
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@ -309,7 +309,6 @@ static void nic_init(struct device *dev)
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printk(BIOS_DEBUG, "NIC_INIT:<----------\n");
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return;
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}
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static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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