drivers/intel/fsp2_0: Add function to report FSP-T output

This allows to compare the FSP-T output in %ecx and %edx to coreboot's
CAR symbols:

Change-Id: I8d79f97f8c12c63ce215935353717855442a8290
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/drivers/intel/fsp2_0/Makefile.inc

@@ -2,6 +2,8 @@
 
 ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
 
+bootblock-$(CONFIG_FSP_CAR) += fspt_report.c
+
 romstage-y += debug.c
 romstage-y += hand_off_block.c
 romstage-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c

src/drivers/intel/fsp2_0/fspt_report.c

@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/symbols.h>
+#include <console/console.h>
+#include <fsp/util.h>
+
+/* filled in assembly after FSP-T ran */
+uintptr_t temp_memory_start;
+uintptr_t temp_memory_end;
+
+void report_fspt_output(void)
+{
+	const struct region fsp_car_region = {
+		.offset = temp_memory_start,
+		.size = temp_memory_end - temp_memory_start,
+	};
+	const struct region coreboot_car_region = {
+		.offset = (uintptr_t)_car_region_start,
+		.size = (uintptr_t)_car_region_size,
+	};
+	printk(BIOS_DEBUG, "FSP-T: reported temp_mem region: [0x%08lx,0x%08lx)\n",
+	       temp_memory_start, temp_memory_end);
+	if (!region_is_subregion(&fsp_car_region, &coreboot_car_region)) {
+		printk(BIOS_ERR, "Wrong CAR region used!\n");
+		printk(BIOS_ERR, "Adapt CONFIG_DCACHE_RAM_BASE and CONFIG_DCACHE_RAM_SIZE to match FSP-T\n");
+	}
+}

src/drivers/intel/fsp2_0/include/fsp/util.h

@@ -89,6 +89,7 @@ bool fsp_guid_compare(const uint8_t guid1[16], const uint8_t guid2[16]);
 void fsp_find_bootloader_tolum(struct range_entry *re);
 void fsp_get_version(char *buf);
 void lb_string_platform_blob_version(struct lb_header *header);
+void report_fspt_output(void);
 
 /* Fill in header and validate sanity of component within region device. */
 enum cb_err fsp_validate_component(struct fsp_header *hdr,

src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S

@@ -72,6 +72,13 @@ CAR_init_done:
 
 	/* Setup bootblock stack */
 	mov	%edx, %esp
+	/*
+	 * temp_memory_start/end reside in the .bss section, which gets cleared
+	 * below. Save the FSP return value to the stack before writing those
+	 * variables.
+	 */
+	push	%ecx
+	push	%edx
 
 	/* clear .bss section as it is not shared */
 	cld
@@ -82,6 +89,11 @@ CAR_init_done:
 	shrl	$2, %ecx
 	rep	stosl
 
+	pop	%edx
+	movl	%edx, temp_memory_end
+	pop	%ecx
+	movl	%ecx, temp_memory_start
+
 	/* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */
 	push	%ebp
 	movd	%mm1, %eax