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mb/siemens/fa_ehl: Process LPDDR4 SPD files and add MT53E512M32D1NP SPD 

The board uses soldered down LPDDR4, so process their SPD files, and add
the SPD for Micron MT53E512M32D1NP-046WTB provided by Micron.

Signed-off-by: Johannes Hahn <johannes-hahn@siemens.com>
Change-Id: I978b7450b106b86eef322df8b33df41e038599eb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77349
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
This commit is contained in:
Johannes Hahn 2023-07-21 11:05:28 +02:00 committed by Felix Held
parent 7dccc596f0
commit 5a87c82428
2 changed files with 36 additions and 0 deletions
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4
src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.inc
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@ -4,3 +4,7 @@ bootblock-y += gpio.c
romstage-y += memory.c romstage-y += memory.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-y += mainboard.c ramstage-y += mainboard.c
SPD_SOURCES = Micron_MT53E512M32D1NP-046WTB.spd.hex
LIB_SPD_CBFS := $(foreach f, $(SPD_SOURCES), \
src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex)

32
src/mainboard/siemens/fa_ehl/variants/fa_ehl/spd/Micron_MT53E512M32D1NP-046WTB.spd.hex Normal file
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@ -0,0 +1,32 @@
23 11 11 0E 16 21 04 08 00 40 00 00 02 22 00 00
00 00 04 0F 92 54 05 00 87 00 90 A8 90 C0 08 60
04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 4D 54 35 33 45 35 31
32 4D 33 32 44 31 4E 50 2D 30 34 36 20 00 00 00
FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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