- Update romcc to version 0.37
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
parent
fc76dcf0d0
commit
5ade04a436
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@ -1,5 +1,5 @@
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VERSION:=0.36
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RELEASE_DATE:=10 October 2003
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VERSION:=0.37
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RELEASE_DATE:=21 October 2003
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PACKAGE:=romcc
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@ -25,6 +25,7 @@ LINUX_TESTS=\
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linux_test5.c \
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linux_test6.c \
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linux_test7.c \
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linux_test8.c \
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TESTS=\
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hello_world.c \
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@ -89,6 +90,10 @@ TESTS=\
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simple_test66.c \
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simple_test67.c \
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simple_test68.c \
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simple_test69.c \
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simple_test71.c \
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simple_test72.c \
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simple_test73.c \
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raminit_test.c \
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raminit_test2.c \
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raminit_test3.c \
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@ -117,8 +122,10 @@ TEST_ASM_O_mmmx_msse:=$(patsubst %.c, tests/%.S-O-mmmx-msse, $(TESTS))
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TEST_ASM_O2_mmmx :=$(patsubst %.c, tests/%.S-O2-mmmx, $(TESTS))
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TEST_ASM_O2_msse :=$(patsubst %.c, tests/%.S-O2-msse, $(TESTS))
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TEST_ASM_O2_mmmx_msse:=$(patsubst %.c, tests/%.S-O2-mmmx-msse, $(TESTS))
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TEST_ASM_ALL:= $(TEST_ASM) $(TEST_ASM_O) $(TEST_ASM_O2) $(TEST_ASM_mmmx) $(TEST_ASM_msse) $(TEST_ASM_mmmx_msse) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse)
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TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse)
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TEST_ASM_O2_mmmx_call :=$(patsubst %.c, tests/%.S-O2-mmmx-call, $(TESTS))
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TEST_ASM_O2_mmmx_msse_call:=$(patsubst %.c, tests/%.S-O2-mmmx-msse-call, $(TESTS))
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TEST_ASM_ALL:= $(TEST_ASM) $(TEST_ASM_O) $(TEST_ASM_O2) $(TEST_ASM_mmmx) $(TEST_ASM_msse) $(TEST_ASM_mmmx_msse) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
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TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
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TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
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TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))
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LINUX_ELF:=$(patsubst %.c, tests/%.elf, $(LINUX_TESTS))
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@ -128,48 +135,56 @@ FAIL_SRCS:=$(patsubst %, tests/%, $(FAIL_TESTS))
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FAIL_OUT:=$(patsubst %.c, tests/%.out, $(FAIL_TESTS))
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ROMCC_OPTS=-fmax-allocation-passes=8 -fdebug-live-range-conflicts
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$(TEST_ASM): %.S: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -o $@ $< > $*.debug
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$(TEST_ASM_O): %.S-O: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O -o $@ $< > $*.debug
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$(TEST_ASM_O2): %.S-O2: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O2 -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -o $@ $< > $*.debug
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$(TEST_ASM_mmmx): %.S-mmmx: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -mmmx -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -mmmx -o $@ $< > $*.debug
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$(TEST_ASM_msse): %.S-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -msse -o $@ $< > $*.debug
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$(TEST_ASM_mmmx_msse): %.S-mmmx-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -mmmx -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -mmmx -msse -o $@ $< > $*.debug
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$(TEST_ASM_O_mmmx): %.S-O-mmmx: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O -mmmx -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O -mmmx -o $@ $< > $*.debug
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$(TEST_ASM_O_msse): %.S-O-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O -msse -o $@ $< > $*.debug
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$(TEST_ASM_O_mmmx_msse): %.S-O-mmmx-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O -mmmx -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O -mmmx -msse -o $@ $< > $*.debug
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$(TEST_ASM_O2_mmmx): %.S-O2-mmmx: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O2 -mmmx -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -mmmx -o $@ $< > $*.debug
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$(TEST_ASM_O2_msse): %.S-O2-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O2 -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -msse -o $@ $< > $*.debug
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$(TEST_ASM_O2_mmmx_msse): %.S-O2-mmmx-msse: %.c romcc
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export ALLOC_CHECK_=2; ./romcc -O2 -mmmx -msse -o $@ $< > $*.debug
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -mmmx -msse -o $@ $< > $*.debug
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$(TEST_ASM_O2_mmmx_call): %.S-O2-mmmx-call: %.c romcc
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -mmmx -fno-always-inline -o $@ $< > $*.debug
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$(TEST_ASM_O2_mmmx_msse_call): %.S-O2-mmmx-msse-call: %.c romcc
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export ALLOC_CHECK_=2; ./romcc $(ROMCC_OPTS) -O2 -mmmx -msse -fno-always-inline -o $@ $< > $*.debug
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$(FAIL_OUT): %.out: %.c romcc
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export ALLOC_CHECK_=2; if ./romcc -O2 -o $*.S $< > $*.debug 2> $@ ; then exit 1 ; else exit 0 ; fi
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export ALLOC_CHECK_=2; if ./romcc $(ROMCC_OPTS) -O2 -o $*.S $< > $*.debug 2> $@ ; then exit 1 ; else exit 0 ; fi
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$(TEST_OBJ): %.o: %.S-O2-mmmx
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as $< -o $@
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3333
util/romcc/romcc.c
3333
util/romcc/romcc.c
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,39 @@
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#include "linux_syscall.h"
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#include "linux_console.h"
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struct mem_param {
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unsigned char cycle_time;
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unsigned char divisor;
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unsigned char tRC;
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unsigned char tRFC;
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unsigned dch_memclk;
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unsigned short dch_tref4k, dch_tref8k;
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unsigned char dtl_twr;
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char name[9];
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};
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static void test(void)
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{
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static const struct mem_param param0 = {
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.name = "166Mhz\r\n",
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.cycle_time = 0x60,
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.divisor = (6<<1),
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.tRC = 0x3C,
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.tRFC = 0x48,
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.dch_memclk = 5 << 20,
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.dch_tref4k = 0x02,
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.dch_tref8k = 0x0A,
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.dtl_twr = 3,
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};
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int value;
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unsigned clocks;
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const struct mem_param *param;
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param = ¶m0;
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value = 0x48;
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/* This used to generate 32bit loads instead of 8 bit loads */
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clocks = (value + (param->divisor << 1) - 1)/(param->divisor << 1);
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print_debug("clocks: ");
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print_debug_hex32(clocks);
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print_debug("\r\n");
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_exit(0);
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}
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@ -0,0 +1,22 @@
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static void outb(unsigned char value, unsigned short port)
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{
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__builtin_outb(value, port);
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}
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static void pnp_write_config(void)
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{
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unsigned char port;
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unsigned char value;
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unsigned char reg;
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port = 0x2e;
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value = 0x03;
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reg = 0x07;
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outb(reg, port);
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outb(value, port +1);
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outb(value -1, port +2);
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}
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static void main(void)
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{
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pnp_write_config();
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}
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@ -0,0 +1,22 @@
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static void main(void)
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{
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int i;
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int dest;
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goto start;
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foo:
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__builtin_outl(dest, 0x5678);
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if (dest == 2) goto middle;
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goto head;
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start:
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dest = 1;
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goto foo;
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head:
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for(i = 0; i < 10; i++) {
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dest = 2;
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goto foo;
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middle:
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__builtin_outl(i, 0x1234);
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}
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}
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@ -0,0 +1,25 @@
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static void foo(void)
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{
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__builtin_outl(22, 0x5678);
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}
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static void main(void)
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{
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int i;
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#if 1
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foo();
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#endif
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#if 1
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foo();
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#endif
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for(i = 0; i < 10; i++) {
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#if 1
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foo();
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#endif
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#if 0
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foo();
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#endif
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__builtin_outl(i, 0x1234);
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}
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}
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@ -0,0 +1,164 @@
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static const char *addr_of_char(unsigned char ch)
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{
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static const char byte[] = {
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
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0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
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0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
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0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
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0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
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0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
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0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
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0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
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0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
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0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
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0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
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0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
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0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
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0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
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0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
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0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
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0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
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0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
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0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
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0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
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0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
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0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
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0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
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0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
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0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
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0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
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0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
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0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
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0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
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0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
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0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
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};
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return byte + ch;
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}
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static void print_debug_char(int c)
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{
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asm volatile(
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"int $0x80"
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:
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: "a" (4), "b" (1), "c" (addr_of_char(c)), "d" (1)
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);
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}
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static void print_debug_nibble(unsigned nibble)
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{
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unsigned char digit;
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digit = nibble + '0';
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if (digit > '9') {
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digit += 39;
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}
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print_debug_char(digit);
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}
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static void print_debug_hex8(unsigned char value)
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{
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print_debug_nibble((value >> 4U) & 0x0fU);
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print_debug_nibble(value & 0x0fU);
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}
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static int smbus_read_byte(unsigned device, unsigned address)
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{
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static const unsigned char dimm[] = {
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0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
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0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
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0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
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0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
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0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
return dimm[(device << 8) + address];
|
||||
}
|
||||
|
||||
static void spd_set_memclk(void)
|
||||
{
|
||||
/* Compute the minimum cycle time for these dimms */
|
||||
unsigned min_cycle_time, min_latency;
|
||||
unsigned device;
|
||||
unsigned value;
|
||||
|
||||
value = 0x50;
|
||||
min_cycle_time= 0x75;
|
||||
min_latency = 2;
|
||||
device = 0;
|
||||
|
||||
|
||||
/* Compute the least latency with the fastest clock supported
|
||||
* by both the memory controller and the dimms.
|
||||
*/
|
||||
int new_cycle_time, new_latency;
|
||||
int index;
|
||||
int latencies;
|
||||
int latency;
|
||||
|
||||
/* First find the supported CAS latencies
|
||||
* Byte 18 for DDR SDRAM is interpreted:
|
||||
* bit 0 == CAS Latency = 1.0
|
||||
* bit 1 == CAS Latency = 1.5
|
||||
* bit 2 == CAS Latency = 2.0
|
||||
* bit 3 == CAS Latency = 2.5
|
||||
* bit 4 == CAS Latency = 3.0
|
||||
* bit 5 == CAS Latency = 3.5
|
||||
* bit 6 == TBD
|
||||
* bit 7 == TBD
|
||||
*/
|
||||
new_cycle_time = 0xa0;
|
||||
new_latency = 5;
|
||||
|
||||
latencies = smbus_read_byte(device, 18);
|
||||
|
||||
/* Compute the lowest cas latency supported */
|
||||
latency = __builtin_bsr(latencies) -2;
|
||||
|
||||
/* Loop through and find a fast clock with a low latency */
|
||||
for(index = 0; index < 1; index++, latency++)
|
||||
{
|
||||
int value;
|
||||
|
||||
if ((latency < 2) || (latency > 4) ||
|
||||
(!(latencies & (1 << latency)))) {
|
||||
continue;
|
||||
}
|
||||
value = smbus_read_byte(device, index);
|
||||
|
||||
/* Only increase the latency if we decreas the clock */
|
||||
if ((value >= min_cycle_time) && (value < new_cycle_time)) {
|
||||
new_cycle_time = value;
|
||||
new_latency = latency;
|
||||
print_debug_hex8(device);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,174 @@
|
|||
static const char *addr_of_char(unsigned char ch)
|
||||
{
|
||||
static const char byte[] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
|
||||
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
|
||||
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
|
||||
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
|
||||
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
|
||||
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
|
||||
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
|
||||
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
|
||||
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
|
||||
0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
|
||||
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
|
||||
0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
|
||||
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
|
||||
0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
|
||||
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
|
||||
0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
|
||||
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
|
||||
0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
|
||||
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
|
||||
0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
|
||||
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
|
||||
};
|
||||
return byte + ch;
|
||||
}
|
||||
|
||||
static void console_tx_byte(unsigned char ch)
|
||||
{
|
||||
asm volatile(
|
||||
"int $0x80"
|
||||
:
|
||||
: "a" (4), "b" (1), "c" (addr_of_char(ch)), "d" (1));
|
||||
}
|
||||
|
||||
static void console_tx_string(const char *str)
|
||||
{
|
||||
unsigned char ch;
|
||||
while((ch = *str++) != '\0') {
|
||||
console_tx_byte(ch);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int smbus_read_byte(unsigned device, unsigned address)
|
||||
{
|
||||
static const unsigned char dimm[] = {
|
||||
0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
|
||||
0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
|
||||
0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
|
||||
0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
|
||||
0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
|
||||
0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
};
|
||||
return dimm[(device << 8) + address];
|
||||
}
|
||||
|
||||
#define SMBUS_MEM_DEVICE_START 0x00
|
||||
#define SMBUS_MEM_DEVICE_END 0x00
|
||||
#define SMBUS_MEM_DEVICE_INC 1
|
||||
|
||||
|
||||
static void spd_set_memclk(void)
|
||||
{
|
||||
/* Compute the minimum cycle time for these dimms */
|
||||
unsigned min_cycle_time, min_latency;
|
||||
unsigned device;
|
||||
unsigned value;
|
||||
|
||||
value = 0x50;
|
||||
min_cycle_time = 0x75;
|
||||
min_latency = 2;
|
||||
device = 0;
|
||||
|
||||
/* Compute the least latency with the fastest clock supported
|
||||
* by both the memory controller and the dimms.
|
||||
*/
|
||||
for(device = SMBUS_MEM_DEVICE_START;
|
||||
device <= SMBUS_MEM_DEVICE_END;
|
||||
device += SMBUS_MEM_DEVICE_INC)
|
||||
{
|
||||
int new_cycle_time, new_latency;
|
||||
int index;
|
||||
int latencies;
|
||||
int latency;
|
||||
|
||||
/* First find the supported CAS latencies
|
||||
* Byte 18 for DDR SDRAM is interpreted:
|
||||
* bit 0 == CAS Latency = 1.0
|
||||
* bit 1 == CAS Latency = 1.5
|
||||
* bit 2 == CAS Latency = 2.0
|
||||
* bit 3 == CAS Latency = 2.5
|
||||
* bit 4 == CAS Latency = 3.0
|
||||
* bit 5 == CAS Latency = 3.5
|
||||
* bit 6 == TBD
|
||||
* bit 7 == TBD
|
||||
*/
|
||||
new_cycle_time = 0xa0;
|
||||
new_latency = 5;
|
||||
|
||||
latencies = smbus_read_byte(device, 18);
|
||||
|
||||
/* Compute the lowest cas latency supported */
|
||||
latency = __builtin_bsr(latencies) -2;
|
||||
|
||||
/* Loop through and find a fast clock with a low latency */
|
||||
for(index = 0; index < 3; index++, latency++) {
|
||||
int value;
|
||||
if ((latency < 2) || (latency > 4) ||
|
||||
(!(latencies & (1 << latency)))) {
|
||||
continue;
|
||||
}
|
||||
value = smbus_read_byte(device, index);
|
||||
if (value < 0) continue;
|
||||
|
||||
/* Only increase the latency if we decreas the clock */
|
||||
if ((value >= min_cycle_time) && (value < new_cycle_time)) {
|
||||
new_cycle_time = value;
|
||||
new_latency = latency;
|
||||
console_tx_byte(device);
|
||||
|
||||
}
|
||||
}
|
||||
console_tx_string("Transmitting this string causes problems\n");
|
||||
/* Does min_latency need to be increased? */
|
||||
if (new_cycle_time > min_cycle_time) {
|
||||
min_cycle_time = new_cycle_time;
|
||||
}
|
||||
/* Does min_cycle_time need to be increased? */
|
||||
if (new_latency > min_latency) {
|
||||
min_latency = new_latency;
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue